2012
DOI: 10.1063/1.4709489
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Vertically integrated double-layer on-chip silicon membranes for 1-to-12 waveguide fanouts

Abstract: General rights This document is made available in accordance with publisher policies. Please cite only the published version using the reference above. Full terms of use are available: Articles you may be interested in Efficient and ultrafast optical modulation of on-chip thermionic emission using resonant cavity coupled electron emitters J.

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Cited by 6 publications
(2 citation statements)
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“…The SWG grating coupler on glass reaches a coupling efficiency of 39.17% at 1555.56 nm, with a 1-dB bandwidth of 29 nm. Double-layer stacked 1 Â 12 multimode interference couplers were also demonstrated based on SiNMs for potential applications in vertically integrated 3-D photonics [60].…”
Section: Nm Integrated Systemsmentioning
confidence: 99%
“…The SWG grating coupler on glass reaches a coupling efficiency of 39.17% at 1555.56 nm, with a 1-dB bandwidth of 29 nm. Double-layer stacked 1 Â 12 multimode interference couplers were also demonstrated based on SiNMs for potential applications in vertically integrated 3-D photonics [60].…”
Section: Nm Integrated Systemsmentioning
confidence: 99%
“…Other approaches have been investigated to build double-layer structures comprised of crystalline silicon, including silicon nanomembrane transfer 11,12 and direct wafer bonding. 13 However, coupling between separate layers has not been demonstrated in the aforementioned methods. Adhesive bonding, which has been used in fabricating photonic devices on single crystalline silicon nanomembrane, 14,15 serves as a good candidate for fabricating double-layer PICs.…”
mentioning
confidence: 99%