Virtual ARM Platform for embedded system developers

Processor design tools integrate in their workflows generators for instruction set simulators (ISS) from architecture descriptions. However, it is difficult to validate the correctness of these simulators. ISA coverage analysis is insufficient to isolate modelling faults, which might only be exposed in corner cases. We present a novel ISA branch coverage analysis, which considers every possible execution path within an instruction and, on demand, generates new test cases to cover the missing paths. We have applied this analysis to industry standard EEMBC and SPEC CPU2006 benchmarks and show that for an ARM V5T model neither of these benchmark suites provides a sufficient ISA coverage to exercise every path through each instruction of the whole instruction set.

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“…Although not as well known as QEMU, SIMIT-ARM has seen significant use in academia, such as in [7,10,26].…”

Section: Testing Methodologymentioning

confidence: 99%

Automated ISA branch coverage analysis and test case generation for retargetable instruction set simulators

Wagstaff

Spink

Franke

2014

Proceedings of the 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems

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“…The ARM is not pure RISC architecture because of various limitations of applications in embedded system. Nowadays Speed is not major constraint but power consumption and cost effective solutions are also playing vital role [1] [2]. In [1] ARM soft processor core were implemented in the context of FPGA based multiprocessor based SOC applications.…”

Section: Related Workmentioning

confidence: 99%

“…The instructions of Data processing, Arithmetic, Branch instructions, Logical and compare were implemented. The [2] proposed Virtual ARM Simulation Platform and discussed how it can be used to reduce design time and cost. …”

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confidence: 99%

FPGA Implementation of ARM Processor

Mahajan¹,

Aswale²,

Ugale³

2014

IJAREEIE

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Nowadays application specific soft processor cores are gaining importance for FPGA based embedded application in which user can configure the processor as per requirement. The architectural simplicity of ARM processors makes them suitable for low power applications. Hardware description languages (HDLs) are commonly used to construct hardware system. FPGA provides reconfigurable platform, so reuse of the design is a common practice to improve the productivity nowadays. In this paper the data processing instructions of ARM processor are implemented using Very high speed integrated circuit Hardware Description Language (VHDL) language and verified by applying test bench on Xilinx's Spartan III based FPGA.KEYWORDS: ARM, VHDL, FPGA, data processing instructions. I.INTRODUCTIONThe Arm processor has large uniform register file, load/store architecture, where data-processing operations only operate on register contents, not directly on memory contents. Simple addressing modes, with all load/store addresses being determined from register contents and instruction fields only Uniform and fixed-length instruction fields to simplify instruction decode [5]. The ARM processor has been specifically designed to be small to reduce power consumption and extend battery operation.The ARM architecture gives Control over both Arithmetic Logic Unit (ALU) and shifter in every data-processing instruction to maximize the use of an ALU and a shifter Load and Store multiple to maximize data throughput. These enhancements to a basic RISC architecture allow ARM processors to achieve a good balance of high performance, small code size and low power consumption.[4] The FPGA based design reduces time to market & adds design flexibility and adaptability with optimal device utilization and conserving both less board space and system power, which is often not the possible in every case of ASIC chips. [3] In following this line of thought, this paper summarizes our recent progress in developing VHDL soft-core of ARM processor on Xilinx's Spartan III based FPGA. An advantage of implementing a full-featured ARM processor soft-core on FPGA is complete hardware customization while implementing various applications. II. RELATED WORKThe hardware debugging technology is integrated in ARM processor so that programmers can view what is happening during execution of code by processor. With this programmers can resolve issues very quickly and reduce time to market and overall development cost. The ARM is not pure RISC architecture because of various limitations of applications in embedded system. Nowadays Speed is not major constraint but power consumption and cost effective solutions are also playing vital role [1] [2]. In [1] ARM soft processor core were implemented in the context of FPGA based multiprocessor based SOC applications. All the 32-bit instructions were implemented with single cycle data path and random logic based instruction decoder. The instructions of Data processing, Arithmetic, Branch instructions, Logical and compare were implem...

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“…An alternative way is learning by virtual platforms. In recent years, more and more researches have focused on building virtual embedded systems [6]. Users can also use software emulators such as QEMU [10] or Virtualizer [11] to design their own virtual embedded systems.…”

Section: Fig 1: Leon3 Gr-xc3s-1500 Development Boardmentioning

confidence: 99%

A Tiny Development Platform with Virtualized Peripherals for Education of Embedded Software Design

Huang

Yang

et al. 2013

AMR

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In the embedded software education, it is usually a burden to give every student a development board in the class due to limited budget. Besides, peripheral devices such as LCD panels also increase the cost. A cheap and flexible way is to use virtual embedded systems in the class. However, virtual systems cannot completely reflect the developing environment on real platforms. In this article, we propose the idea that combines the virtual and real embedded platforms. The proposed platform preserves the core of the hardware board, so that developers can design embedded software applications in the real developing environment. In addition, we eliminate the peripheral wires and connectors on hardware board and use virtual peripherals and peripherals on PC instead, such that designers can easily control and change peripherals. The proposed idea can significantly reduce cost and increase flexibility when teaching embedded software design. Moreover, the size of development board can be reduced as well. Without the restriction of peripheral connectors and devices, development boards become portable and more easy to use.

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Virtual ARM Platform for embedded system developers

Cited by 10 publications

References 8 publications

Automated ISA branch coverage analysis and test case generation for retargetable instruction set simulators

Automated ISA branch coverage analysis and test case generation for retargetable instruction set simulators

FPGA Implementation of ARM Processor

A Tiny Development Platform with Virtualized Peripherals for Education of Embedded Software Design

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