Virtualized Execution Runtime for FPGA Accelerators in the Cloud

Asiatici, Mikhail; George, Nithin V.; Vipin, Kizheppatt; Fahmy, Suhaib A.; Ienne, Paolo

doi:10.1109/access.2017.2661582

Cited by 61 publications

(28 citation statements)

References 21 publications

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“…Only very recent research is investigating FPGA virtualization in the spatial domain. Asiatici et al [13] proposed dynamic scheduling which can take advantage of the free slots available at run-time to improve utilization and thus the performance. This scheduling approach maximizes the number of pipeline instances when a task is created and keeps this allocation untouched until task completion.…”

Section: Schedulingmentioning

confidence: 99%

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A Survey on FPGA Virtualization

Vaishnav

Pham

Koch

2018

2018 28th International Conference on Field Programmable Logic and Applications (FPL)

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FPGA accelerators are being applied in various types of systems ranging from embedded systems to cloud computing for their high performance and energy efficiency. Given the scale of deployment, there is a need for efficient application development, resource management, and scalable systems, which make FPGA virtualization extremely important. Consequently, FPGA virtualization methods and hardware infrastructures have frequently been proposed in both academia and industry for addressing multi-tenancy execution, multi-FPGA acceleration, flexibility, resource management and security. In this survey, we identify and classify the various techniques and approaches into three main categories: 1) Resource level, 2) Node level, and 3) Multi-node level. In addition, we identify current trends and developments and highlight important future directions for FPGA virtualization which require further work.

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Section: Schedulingmentioning

confidence: 99%

“…Thus, infrastructure and resource management techniques are considered for this level. Examples include VMM support [11], [12], run-time systems [13] and Shells (also called FPGA OS and Hypervisor-vFPGA approach) which are used to serve multiple concurrent user accelerators [2], [11], [14]- [16].…”

Section: Introductionmentioning

confidence: 99%

A Survey on FPGA Virtualization

Vaishnav

Pham

Koch

2018

2018 28th International Conference on Field Programmable Logic and Applications (FPL)

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“…But the required support for the network layer consume a reasonable resource of FPGA. However, Asiatici et al [89] developed a lightweight version featuring high-end application program interface (API), with a simpler execution model and shared memory. They proved their concept by measuring the marginal performance overhead.…”

Section: Shellsmentioning

confidence: 99%

“…Largely, scheduling techniques fall in non-preemptive category, which is fundamentally a time domain optimization. However, a dynamic approach has recently been introduced in [89], which takes advantage of the empty slots and keeps the utilization balanced on the run time. This dynamic scheduling technique enables the multi-tenancy like none other, as it gives the power of increasing or decreasing the resources usage, as per the workload requirement.…”

Section: Schedulingmentioning

confidence: 99%

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Revisiting the High-Performance Reconfigurable Computing for Future Datacenters

2020

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Modern datacenters are reinforcing the computational power and energy efficiency by assimilating field programmable gate arrays (FPGAs). The sustainability of this large-scale integration depends on enabling multi-tenant FPGAs. This requisite amplifies the importance of communication architecture and virtualization method with the required features in order to meet the high-end objective. Consequently, in the last decade, academia and industry proposed several virtualization techniques and hardware architectures for addressing resource management, scheduling, adoptability, segregation, scalability, performance-overhead, availability, programmability, time-to-market, security, and mainly, multitenancy. This paper provides an extensive survey covering three important aspects—discussion on non-standard terms used in existing literature, network-on-chip evaluation choices as a mean to explore the communication architecture, and virtualization methods under latest classification. The purpose is to emphasize the importance of choosing appropriate communication architecture, virtualization technique and standard language to evolve the multi-tenant FPGAs in datacenters. None of the previous surveys encapsulated these aspects in one writing. Open problems are indicated for scientific community as well.

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A parallel hardware hypervisor for hardware‐accelerated cloud computing

Doğan

Ebcioğlu

2021

Concurrency and Computation

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Hardware-accelerated cloud computing systems based on FPGA or ASIC chips have proved useful in providing power-efficient acceleration for a variety of software applications. However, these computing systems rely on operating systems and hypervisors, which not only are implemented with inefficient software, but which also are incapable of handling massively parallel systems, due to the lack of parallelism and scalability in their algorithmic designs. As a result, power, performance, and scalability problems will emerge in an exascale cloud computing environment. As a solution to these problems, the present study proposes a parallel hardware hypervisor system implemented entirely in special-purpose hardware without resorting to energy-inefficient general-purpose processors. Furthermore, the proposed hypervisor system virtualizes application-specific multi-chip supercomputers, in order to enable the virtual supercomputers to share available FPGA and semi-configurable ASIC resources in a cloud system. Single-chip verification studies based on Verilog simulation have been done to verify the functional correctness of the proposed hardware hypervisor system, which consumes only a fraction of hardware resources. This article will in particular focus on the virtualization of multi-chip message-passing based supercomputers using limited reconfigurable hardware resources.

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Virtualized Execution Runtime for FPGA Accelerators in the Cloud

Cited by 61 publications

References 21 publications

A Survey on FPGA Virtualization

A Survey on FPGA Virtualization

Revisiting the High-Performance Reconfigurable Computing for Future Datacenters

A parallel hardware hypervisor for hardware‐accelerated cloud computing

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