2007
DOI: 10.1063/1.2711531
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Voltage- and light-induced hysteresis effects at the high-k dielectric—poly(3-hexylthiophene) interface

Abstract: Articles you may be interested inCarrier mobility enhancement in poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonate) having undergone rapid thermal annealing

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Cited by 17 publications
(21 citation statements)
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“…In both cases, light passing through the semitransparent electrode of C 1 generates excitons in the P3HT. As reported previously, 16,17 when C 1 is driven into depletion, excitons close to the interface with the insulator dissociate releasing free electrons. A significant fraction became trapped in interface/insulator states causing a positive shift in the flatband voltage, V FB .…”
supporting
confidence: 65%
“…In both cases, light passing through the semitransparent electrode of C 1 generates excitons in the P3HT. As reported previously, 16,17 when C 1 is driven into depletion, excitons close to the interface with the insulator dissociate releasing free electrons. A significant fraction became trapped in interface/insulator states causing a positive shift in the flatband voltage, V FB .…”
supporting
confidence: 65%
“…Furthermore, the applied V G plays an important role in determining the polarity of the transferring carriers and the modulation of V th : a positive (negative) V G leads to a positive (negative) shift in V th . In addition to these results for rubrene single‐crystal OFETs, the photoinduced bias stress effect has been examined in diverse material systems including a tetracene single crystal, a tetraphenylbis(indolo{1,2‐ a })quinoline single crystal, a pentacene thin film, a dinaphtho[2,3‐b:2',3'‐f]‐thieno[3,2‐b]thiophene thin film, and a polythiophene thin film . Such photoinduced charge transfer could be an advantage in improving the optical sensitivity of phototransistors or in optically programmed memory devices .…”
Section: The Effects Of Bias Stress On Organic Transistorsmentioning
confidence: 99%
“…Interestingly, the density of these relatively "fast" states are about two orders of magnitude less than the density of the "slow" states responsible for the gate-bias stress instability which has been reported by several groups using different insulators and/or different semiconductors. 2,[14][15][16][17] Careful device modeling coupled with appropriate device geometry should enable accurate values for ͑G / ͒ m to be obtained for a range of signal frequencies, thus allowing different energy states at the interface to be probed. Hence, a density of states profile could be deduced for the interface traps allowing the effects of different processing conditions to be evaluated.…”
Section: Discussionmentioning
confidence: 99%