Voltage Regulators for Next Generation Microprocessors

López, Toni; Elferich, Reinhold; Alarcón, Eduard

doi:10.1007/978-1-4419-7560-7

Cited by 16 publications

(11 citation statements)

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“…In dc-dc conversion, the switching performance of the power MOSFET is a major contributor to power loss [32]. The MOSFET parameters that play an important role include…”

Section: Switching Performancementioning

confidence: 99%

Considerations in the design of a low‐voltage power MOSFET technology

Rutter¹

2019

IET Power Electronics

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Discrete low-voltage power metal-oxide-semiconductor field effect transistors are used in a wide variety of applications with each application relying on different aspects of device behaviour. The conflicting requirements of these applications along with constraints such as legislation, industrial base, and intellectual property have resulted in a diverse array of technologies available in the market. This study outlines the many considerations that are faced when designing a highperformance silicon power MOSFET technology contrasting the trade-offs involved as factors such as on-state resistance, switching performance, reliability, and robustness in the application are optimised. 3 Intellectual property There are ∼3000 granted US patents relating to vertical doublediffused metal-oxide-semiconductor (DMOS) devices with a trench gate (classification H01 29/7813) with the number increasing at about 300 per year. In such a fiercely competitive market, protecting intellectual property is crucial. Consideration of the

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“…In dc-dc conversion, the switching performance of the power MOSFET is a major contributor to power loss [32]. The MOSFET parameters that play an important role include…”

Section: Switching Performancementioning

confidence: 99%

Considerations in the design of a low‐voltage power MOSFET technology

Rutter¹

2019

IET Power Electronics

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“…If BV DSS of LS-FET is low enough, then V SW_MAX = BV DSS (remember that V SW ∼ V DS_LS-FET ). A detailed analysis of the avalanche occurring during LE is found in [13]. Similarly, as in a clamped inductive switching, as long as the avalanche persists, the current is discharged from the stray inductance through the LS-FET.…”

Section: Induced Avalanche Operationmentioning

confidence: 99%

“…Since TE and LE are asymmetric commutations, there is no reckoning of identical avalanche behaviour. Differently from LE, ultra-fast TE is a convoluted process with many variables involved [13]. A large V DS_HS-FET ringing is originated by the fact that HS-FET turn-off is faster than LS-FET C OSS discharge.…”

Section: Induced Avalanche Operationmentioning

confidence: 99%

Overcoming switching limits in silicon power MOSFETs with silicon‐based solutions

Roig

Bauwens

2018

IET Power Electronics

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This work presents a review of new concepts and trends to push silicon power MOSFETs beyond their switching boundaries. The multiple issues encountered when increasing switching power loss and slew rate are thoroughly explained. Afterwards, a large variety of solutions are proposed in silicon technologies, all of them being experimentally proven and elucidated by physics-based simulations. Among these solutions, co-integrated snubbers, induced avalanche operation, local charge balance, tapered trenches, and cascoded configuration are suggested for low-and high-voltage power MOSFETs.

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“…The reverse recovery characteristics of the body diode are considered in [13]- [14]: the analysis of the spurious triggering pulse is divided into the capacitive and the inductive parts and then implemented one by one in [13], while [14] adopts the behavior model of power MOSFETs to simulate the effect of the gate bias and source inductance on the spurious triggering pulse. On the impact of the source inductance of the SyncFET, opinions differ: [9]- [11] advocate it helps reduce the pulse, while [12]- [14] hold the opposite opinion.…”

Section: Nomenclaturementioning

confidence: 99%

New insight into the mechanism of the spurious triggering pulse in the bridge-leg configuration

Wang

Chung

2013

2013 5th International Conference on Power Electronics Systems and Applications(PESA)

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The spurious triggering pulse is an intrinsic feature in the gate-source voltage of the synchronous switch of the bridge-leg configuration. If it exceeds the threshold voltage of the switch, the spurious turn-on will occur and consequently incur excessive switching losses, self-oscillation and even shoot-through. This paper intends to establish a circuit-level analytical model of the synchronous buck converter considering all important parasitic elements and the reverse recovery characteristics of the body diode of the synchronous MOSFET to explore the underlying mechanism of the spurious triggering pulse. It is discovered that apart from the generally acknowledged Cdv/dt induced increase in the gate voltage, the Ldi/dt induced decease in the source voltage contributes to the pulse as well. Besides, the impact of the gate impedance of the synchronous MOSFET on this pulse depends on the dominance of these two factors. The analytical results will be verified by the experimental results of the prototype of a 40V/6A synchronous buck converter. Keywords-MOSFET, spurious turn-on, Cdv/dt induced turn-on, bridge-leg configuration.Nomenclature C gs gate-source capacitance C gd gate-drain capacitance C ds drain-source capacitance L d drain inductance L s source inductance L g gate inductance L ds Total drain and source inductances R g gate drive resistance g fs transconductance V th threshold voltage Q RR reverse recovery charge S snappiness factor M CtrlFET M 2 SyncFET v ds drain-source voltage v gs gate-source voltage v gd gate-drain voltage i ch channel current i d drain current i g gate current i f body diode current I L load current V DD input voltage V GG high gate voltage v Lds voltage across L ds V ds(on) on-state voltage of the MOSFET V Db(on) on-state voltage of the body diode

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Voltage Regulators for Next Generation Microprocessors

Cited by 16 publications

References 0 publications

Considerations in the design of a low‐voltage power MOSFET technology

Considerations in the design of a low‐voltage power MOSFET technology

Overcoming switching limits in silicon power MOSFETs with silicon‐based solutions

New insight into the mechanism of the spurious triggering pulse in the bridge-leg configuration

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