Wafer-level process variation-driven probe-test flow selection for test cost reduction in analog/RF ICs

Ahmadi, Ali; Nahar, Amit; Orr, Bob; Past, Michael; Makris, Yiorgos

doi:10.1109/vts.2016.7477263

Cited by 15 publications

(4 citation statements)

References 13 publications

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“…Ideas for mixed-signal circuits include: (a) Skipping tests on a wafer-by-wafer basis based on fail statistics of the wafer [18], [28]- [30]; (b) Skipping tests that have a high pass probability on a die-to-die basis [31]- [33]; (c) Tightening onthe-fly test limits so as to improve quality control and outlier detection [34]- [37]; (d) Changing the order of tests so as to move forward tests that have proven to achieve higher fault coverage [38]; (e) Assessing on-the-fly the confidence of lowcost machine learning-based test solutions so as to perform a standard test if confidence is low [10], [11] or stop testing if the device is deemed functional with high confidence [39]; and (f) Re-learning periodically the statistical mappings in low-cost machine learning-based tests so as to account for manufacturing process drifts [40].…”

Section: Previous Work On Adaptive Testmentioning

confidence: 99%

Adaptive Test With Test Escape Estimation for Mixed-Signal ICs

Stratigopoulos

Streitwieser

2018

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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The standard approach in industry for postmanufacturing testing of mixed-signal circuits is to measure the performances that are included in the data sheet. Despite being accurate and straightforward, this approach involves a high test time since there are numerous performances that need to be measured sequentially by switching the circuit into different test configurations. Adaptive test is a new test paradigm that still adheres to the standard approach, but it adjusts it on-the-fly to the particularities of the circuit under test so as to better control test time and to achieve robust outlier detection. In this paper, we present an adaptive test flow for mixed-signal circuits that has comprehensive user-defined parameters to span the trade-off between test time savings and fault coverage so as to select an advantageous point on the curve based on test economics. The flow also provides robust test escape risk estimation so as to add confidence to the test process. The proposed idea is demonstrated on a sizable production dataset from a large mixed-signal circuit.Index Terms-Mixed analog digital integrated circuit testing, adaptive testing, test metrics estimation, dynamic part average testing.

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Section: Previous Work On Adaptive Testmentioning

confidence: 99%

Adaptive Test With Test Escape Estimation for Mixed-Signal ICs

Stratigopoulos

Streitwieser

2018

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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“…An adaptive test framework is now being advocated to replace the traditional testing approach, and it provides a new strategy to reduce test costs [8]. In the adaptive test, each circuit can be tested with a unique process, which may involve adjusting the test items; that is, given a test suite, certain ineffective items are eliminated so as to reduce the testing time [9,10].…”

Section: Introductionmentioning

confidence: 99%

“…The above approaches focused on selecting the optimal test set, but they did not consider the correction between tests, which limits the reduction in cost. To address this issue, Ahmadi et al [9] proposed a method to dynamically select whether to subject a wafer to a complete or a reduced test set based on an e-test signature. Xin Li et al [15] proposed an iterative test selection method with Bayesian index for test cost reduction.…”

Section: Introductionmentioning

confidence: 99%

Identifying the Optimal Subsets of Test Items through Adaptive Test for Cost Reduction of ICs

et al. 2021

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With the growing complexity of integrated circuits (ICs), more and more test items are required in testing. However, the large number of invalid items (which narrowly pass the test) continues to increase the test time and, consequently, test costs. Aiming to address the problems of long test time and reduced test item efficiency, this paper presents a method which combines a fast correlation-based filter (FCBF) and a weighted naive Bayesian model which can identify the most effective items and make accurate quality predictions. Experimental results demonstrate that the proposed method reduces test time by around 2.59% and leads to fewer test escapes compared with the recently adopted test methods. The study shows that the proposed method can effectively reduce the test cost without jeopardizing test quality excessively.

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“…Adaptive testing is a general term that refers to methods that try to bend the test time-test quality curve by learning from the smaller, localized set of devices or the DUT's own behavior [5][6][7][8][9][10][11][12]. The concept of adaptive test can be applied to learn/optimize within the lot [5], within the wafer [6][7][8], or within the device under test itself [9][10][11][12]. With increasing granularity, there is a better chance to tailor the test, and potentially higher computational effort for learning/optimizing.…”

Section: Introductionmentioning

confidence: 99%

Adaptive Test for RF/Analog Circuit Using Higher Order Correlations among Measurements

Yılmaz²,

Sarson³

et al. 2019

ACM Trans. Des. Autom. Electron. Syst.

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As process variations increase and devices get more diverse in their behavior, using the same test list for all devices is increasingly inefficient. Methodologies that adapt the test sequence with respect to lot, wafer, or even a device's own behavior help contain the test cost while maintaining test quality. In adaptive test selection approaches, the initial test list, a set of tests that are applied to all devices to learn information, plays a crucial role in the quality outcome. Most adaptive test approaches select this initial list based on fail probability of each test individually. Such a selection approach does not take into account the correlations that exist among various measurements and potentially will lead to the selection of correlated tests. In this work, we propose a new adaptive test algorithm that includes a mathematical model for initial test ordering that takes correlations among measurements into account. The proposed method can be integrated within an existing test flow running in the background to improve not only the test quality but also the test time. Experimental results using four distinct industry circuits and large amounts of measurement data show that the proposed technique outperforms prior approaches considerably. CCS Concepts: • Hardware → Analog, mixed-signal and radio frequency test;

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Wafer-level process variation-driven probe-test flow selection for test cost reduction in analog/RF ICs

Cited by 15 publications

References 13 publications

Adaptive Test With Test Escape Estimation for Mixed-Signal ICs

Adaptive Test With Test Escape Estimation for Mixed-Signal ICs

Identifying the Optimal Subsets of Test Items through Adaptive Test for Cost Reduction of ICs

Adaptive Test for RF/Analog Circuit Using Higher Order Correlations among Measurements

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