Wafer scale and reliability investigation of thin HfO2·AlGaN/GaN MIS-HEMTs

Analysis of slow de-trapping phenomena after a positive gate bias on AlGaN/GaN MIS-HEMTs with in-situ Si3N4/Al2O3 bilayer gate dielectrics

“…Recently, lots of efforts have been done to develop low cost high performance large area GaN-on-Si technology [1-3] for power switching or RF applications. In order to develop a high performance device with a low gate leakage current, a high gate overdrive, and a high breakdown voltage, AlGaN/GaN Metal Insulated Semiconductors High Electron Mobility Transistors (MIS-HEMTs) have been demonstrated [4,5].Nowadays, reliability issues have been extensively studied under the off-state and on-state bias conditions [6][7][8]. However, the device performance is still limited by trapping/de-trapping phenomena, resulting in a V TH shift and a R ON increase [7,8].…”

Gate current analysis of AlGaN/GaN on silicon heterojunction transistors at the nanoscale

“…In particular, minimizing the off-state leakage currents in AlGaN/ GaN HEMT is primordial to their implementation into systems with low noise and low power consumption. 1 This is particularly true when the GaN buffer is grown on silicon. Its narrow bandgap, together with the lattice mismatch and the thermal expansion coefficient difference, makes the AlGaN/ GaN on Si stack challenging for sustaining high voltages with low leakage.…”

Modeling the effect of thin gate insulators (SiO2, SiN, Al2O3 and HfO2) on AlGaN/GaN HEMT forward characteristics grown on Si, sapphire and SiC

“…However, in general, it may be observed that a relatively small increase or decrease ( $ 1-10%) of the 2DEG carrier concentration occurs due to the action of the passivation of surface charges, thereby affecting somehow the AlGaN polarization charge [28,29]. The variety of gate insulators and deposition techniques has resulted in a strong dispersion of the available data in the literature [26][27][28][29][30][31][32][33][34]. In this sense, it is worth mentioning that some authors have reported more relevant differences in n s and m n when comparing Schottky and MIS gate HEMTs [30,31].…”

“…For example, if it is not completely and homogeneously removed from the source/drain area, an ultra-thin layer could act as an additional barrier thus increasing the onresistance. As the wafer scale maps are uncommon in the literature [32,33], the differences obtained for a small population of devices could easily bring inconclusive statements. Furthermore, insulator deposition techniques have inherently some drift in their dielectric constant and/or thickness.…”