2019
DOI: 10.1021/acsami.9b19471
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Wafer-Scale, Conformal, and Low-Temperature Synthesis of Layered Tin Disulfides for Emerging Nonplanar and Flexible Electronics

Abstract: Two-dimensional (2D) metal dichalcogenides have drawn considerable interest because they offer possibilities for the implementation of emerging electronics. The emerging electronics are moving toward two major directions: vertical expansion of device space and flexibility. However, the development of a synthesis method for 2D metal dichalcogenides that meets all the requirements remains a significant challenge. Here, we propose a promising method for wafer-scale, conformal, and low-temperature (≤240 °C) synthe… Show more

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Cited by 21 publications
(24 citation statements)
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“…2019 [251] SnS [291] www.advmatinterfaces.de MoS 2 : ALD MoS 2 films usually behave as n-type semiconductors, which means that they are turned on (off) by applying a positive (negative) gate voltage (the reverse is true for p-type semiconductors). The best ALD MoS 2 FET performance so far has been reported by Jeon et al [118] for 5 ML MoS 2 films deposited using Mo(CO) 6 and EtSSEt at 250 °C followed by rapid thermal annealing in an Ar atmosphere at 450 °C for 30 s. Bottom gate FETs with an excellent mobility of 13.9 cm 2 V −1 s −1 (10.6 ± 2.6 cm 2 V −1 s −1 over 9 devices) and a large I on /I off ratio of 10 8 were achieved by using an SEt 2 pretreatment dubbed inhibited ALD (iALD) to reduce the nucleation density (Figure 11a).…”
Section: Field-effect Transistorsmentioning
confidence: 99%
See 1 more Smart Citation
“…2019 [251] SnS [291] www.advmatinterfaces.de MoS 2 : ALD MoS 2 films usually behave as n-type semiconductors, which means that they are turned on (off) by applying a positive (negative) gate voltage (the reverse is true for p-type semiconductors). The best ALD MoS 2 FET performance so far has been reported by Jeon et al [118] for 5 ML MoS 2 films deposited using Mo(CO) 6 and EtSSEt at 250 °C followed by rapid thermal annealing in an Ar atmosphere at 450 °C for 30 s. Bottom gate FETs with an excellent mobility of 13.9 cm 2 V −1 s −1 (10.6 ± 2.6 cm 2 V −1 s −1 over 9 devices) and a large I on /I off ratio of 10 8 were achieved by using an SEt 2 pretreatment dubbed inhibited ALD (iALD) to reduce the nucleation density (Figure 11a).…”
Section: Field-effect Transistorsmentioning
confidence: 99%
“…Pyeon et al. [ 251 ] deposited SnS 2 films using Sn(dmamp) 2 and H 2 S plasma at 150 to 240 °C. Although the film crystallinity improved with increasing deposition temperature, this was accompanied by transformation to rough, “flaky” morphology, which is unsuitable for FETs.…”
Section: Applications Of Atomic Layer Deposited 2d Metal Dichalcogenidesmentioning
confidence: 99%
“…[ 34,35 ] ALD has been used to deposit continuous SnS 2 films with thicknesses from approximately two up to tens of monolayers. [ 36–41 ] In addition to thermal ALD processes, [ 36–39 ] plasma‐enhanced ALD (PEALD) and plasma sulfurization of ALD‐grown SnO films have recently been reported as alternative approaches to deposit high‐quality SnS 2 . [ 40,41 ]…”
Section: Introductionmentioning
confidence: 99%
“…[ 44–46 ] The growth rates may be low, [ 44,47,48 ] rough flake‐like films are often obtained, [ 48–52 ] and the low growth temperature and high nucleation density lead to small grain size which limits the electrical performance of the films. [ 38,41,44 ]…”
Section: Introductionmentioning
confidence: 99%
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