2017 IEEE 12th International Conference on Nano/Micro Engineered and Molecular Systems (NEMS) 2017
DOI: 10.1109/nems.2017.8016973
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Wafer-scale nanostructure formation inside vertical nano-pores

Abstract: We propose a wafer-scale technique for nanostructure formation inside vertically oriented, throughmembrane nano-pores. It uses 50 nm monocrystalline silicon pillars as a mold, embedded in a silicon nitride membrane formed in an innovative step. The proposed technique paves the way towards advanced functionalization of parallel oriented nano-pores for actuation, sensing, filtering/trapping purposes.

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Cited by 3 publications
(4 citation statements)
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“…A schematic illustration of the cMIS tunneling junction is shown in Figure 1. The junctions are created inside an array of silicon nanopillars embedded in a silicon-rich silicon nitride (SiRN) membrane [6]. Utilizing displacement Talbot lithography (DTL), the pillar diameter and pitch are about 80 nm and 250 nm, respectively.…”
Section: Design Considerationmentioning
confidence: 99%
See 1 more Smart Citation
“…A schematic illustration of the cMIS tunneling junction is shown in Figure 1. The junctions are created inside an array of silicon nanopillars embedded in a silicon-rich silicon nitride (SiRN) membrane [6]. Utilizing displacement Talbot lithography (DTL), the pillar diameter and pitch are about 80 nm and 250 nm, respectively.…”
Section: Design Considerationmentioning
confidence: 99%
“…In fabrication step (6), low-stress SiRN (~400 nm) was conformally deposited using LPCVD to fill the empty space between the pillars. Subsequently, poly-silicon (~50 nm) was deposited at 590 °C and wet oxidized (~10 nm) at 800 °C.…”
Section: Device Fabricationmentioning
confidence: 99%
“…Besides being used as the functional device area, the SiNW structure can also be used as a template for other applications. An example is by embedding the SiNWs in a dielectric ceramic material, typically low-stress silicon-rich silicon nitride (SiRN), that can be deposited through low-pressure chemical vapour deposition (LPCVD) [5]. Furthermore, since the SiNWs are fabricated from a single crystal, they can be machined by a combination of anisotropic etching and self-aligned nano-patterning techniques such as corner lithography [6,7].…”
Section: Introductionmentioning
confidence: 99%
“…Some specific 3D structures can sometimes be obtained by applying conventional wafer-scale nanofabrication techniques in unconventional combinations [7,[30][31][32][33][34][35][36][37][38][39][40][41][42][43][44][45][46][47][48]. Many of these use the edge or corner of some feature as a starting point for defining new features ('Edge Lithography' [33] or 'Corner Lithography' [36]) and/or the specific orientation of certain surfaces which results in a contrast in deposition or etching speed.…”
Section: Introductionmentioning
confidence: 99%