Wafer thinning, bonding, and interconnects induced local strain/stress in 3D-LSIs with fine-pitch high-density microbumps and through-Si vias

Murugesan, M.; Kino, Hisashi; Nohira, Hiroshi; Bea, Jicheol; Horibe, Akihiro; Yamada, Fumiaki; Miyazaki, C.; Kobayashi, H.; Fukushima, T.; Tanaka, Tetsu; Koyanagi, Mitsumasa

doi:10.1109/iedm.2010.5703279

Cited by 77 publications

(25 citation statements)

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“…It is presumed that the very large volume expansion while heating (the very large CTE of epoxy than Si ) and the very slow volume compression during the die cooling (the extremely poor thermal conductivity of epoxy than the Si) might induce the tensile strain Si. This kind of phenomenon (i.e., periodical compressive stress and tensile strain locally induced in thin Si die owing to the CTE mismatch between Si and epoxy) is previously reported by the author [10,11]. It is worth mentioning that the stress distribution is initially concentrated at the center of the bumping pad before applying external load for bonding.…”

Section: Resultsmentioning

confidence: 85%

Impact of microbump induced stress in thinned 3D-LSIs after wafer bonding

Murugesan

Ohara

Bea

et al. 2010

2010 IEEE International 3D Systems Integration Conference (3DIC)

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Micro-Raman spectroscopic technique has been employed to study the induced stress/strain by the metal microbumps in 3D-LSI Si die/wafer after wafer thinning and bonding, and the impact of bump spacing, bump size, bonding temperature and bonding force in the stress distribution in such a microbump bonded LSIs has been investigated. It is inferred that (i) the Si present at the interface (between CuSn and LSI die/wafer) is under compressive stress, and it decreases exponentially in the cross-sectional direction both in the die and the wafer; (ii) in the lateral direction, the compressive stress produced by the adjacent microbumps overlapped to each other at the region of bump-spacing; (iii) qualitatively, the residual mechanical stress/strain increases with the bonding temperature and the size of the microbump, i.e. it is large for the higher bonding temperature (as high as >300 MPa @300 ) than for the non-bonded microbump (a maximum of only +125 MPa @ 280 ); (iv) the metal microbump exerted a large compressive stress up to the depth of >10 Pm in the bonded 3D-LSI die/wafer.

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Section: Resultsmentioning

confidence: 85%

Impact of microbump induced stress in thinned 3D-LSIs after wafer bonding

Murugesan

Ohara

Bea

et al. 2010

2010 IEEE International 3D Systems Integration Conference (3DIC)

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“…Also, the effect of mechanical stress and crystal damage is found to be enhanced when the Si thickness is reduced to below 20 lm. 145 Possible causes include wafer thinning that introduces crystal damages, various films deposited on Si that introduces stress, and CTE mismatch between bonding agents and Si as the bonding is performed at higher temperatures. This imposes new requirements in finding improved process flows in making TSV, particularly with aspect ratio exceeding 10.…”

Section: A 25d Tsi Technology Roadmapmentioning

confidence: 99%

Heterogeneous 2.5D integration on through silicon interposer

Zhang¹,

Lin²,

Wickramanayaka³

et al. 2015

Applied Physics Reviews

129

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“…With the demand increasing significantly in big data for the Internet of Things (IoT), advanced packaging technology of 2.5D or 3DIC TSV structures and fan-out wafer level packaging technology are being widely studied and developed [1][2][3][4][5]. The interconnection in advanced packaging has recently begun being stacked in the z direction, so packaging structures and their fabrication processes have become more and more complicated.…”

Section: Introductionmentioning

confidence: 99%

Development of Liquid Photoresist for IMS (Injection Molded Solder) with High Thermal Stability

Mukawa¹,

Takahashi²,

Kobata³

et al. 2016

J. Photopol. Sci. Technol.

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Novel bumping technology that can realize high density assembly of IC chips and packages with a high number of I/O is required in the field of electronic packaging. Recently, a novel bumping process called IMS (Injection Molded Solder) was proposed, which enabled direct injection of molten solder into the holes of a photoresist patterned array. In this paper, the current status of photoresist development and recent achievements for obtaining excellent solder filling rates are described. One of the important factors to obtain a high solder filling rate is reducing the amount of outgases from the photoresists at high temperature, as they prevent smooth solder filling into the photoresist holes. In order to solve such an issue, novel photoresists with high thermal stability have been designed and developed.

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Wafer thinning, bonding, and interconnects induced local strain/stress in 3D-LSIs with fine-pitch high-density microbumps and through-Si vias

Cited by 77 publications

References 0 publications

Impact of microbump induced stress in thinned 3D-LSIs after wafer bonding

Impact of microbump induced stress in thinned 3D-LSIs after wafer bonding

Heterogeneous 2.5D integration on through silicon interposer

Development of Liquid Photoresist for IMS (Injection Molded Solder) with High Thermal Stability

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