The effect of curing process on the warpage of encapsulated electronic package is considered by using a coupled chemical-thermo-mechanical modeling methodology. A cure-dependent constitutive model that consists of a cure kinetics model, a curing and chemical aging induced shrinkage model and a degree of cure-dependent viscoelastic relaxation model was implemented in a numerical finite element model for warpage simulation. Effects of polymerization conversion and chemical aging on the warpage evolution of a bimaterial dummy package after molding and during the post-mold curing (PMC) process were investigated by using the proposed modeling methodology. Shadow Moiré warpage analyses were also performed to validate the numerical results. It was found from the warpage analyses that the chemical aging, while contributing little to the overall crosslinking during PMC, has a significant effect on package warpage. The coupled chemical-thermomechanical model can be applied for performing numerical optimization for packaging process and assembly reliability.
IntroductionThe tendency of thermosetting polymers to expand or contract more significantly than other package constituents during processing is widely recognized as a critical issue for electronic packages: from the assembly yield perspective, the deviation of the package from a planar state, or warpage, as a result of the mismatch in volume changes would increase the difficulty in achieving good interconnection to circuit board for surface mount area array packages; from the reliability perspective, the associated residual stress would accelerate defect growth and product failure. Polymeric packaging materials, such as epoxy molding compound (EMC), underfill, and substrates undergo significant volume changes during assembly processes because of their high coefficients of thermal expansion (CTEs) and the chemical shrinkage occurring at high temperatures.With the higher reflow temperatures associated with Pbfree assembly processes, packages are more prone to the warpage and stress issues related to the mismatch in package material expansion or contraction. In addition to that, the technology trend of system integration at package level and finer package-to-circuit-board-interconnect pitch are placing more tightened specifications on both coplanarity and inplane alignment accuracy. For example, in state-of-the-art embedded wafer level packaging process, two of the key challenges are the silicon die location shift and warpage of the reconfigured wafer, both of which are related to the shrinkage of the molding compound used for encapsulating the reconfigured wafer [1]. In order to meet the more stringent