Wave pipelining for majority-based beyond-CMOS technologies

Abstract

Abstract-The performance of some emerging nanotechnologies benefits from wave pipelining. The design of such circuits requires new models and algorithms. Thus we show how MajorityInverter Graphs (MIG) can be used for this purpose and we extend the related optimization algorithms. The resulting designs have increased throughput, something that has traditionally been a weak point for the majority of non-charge-based technologies. We benchmark the algorithm on MIG netlists with three different technologies, Spin Wave Devices (SWD), Quantum-dot Cellular Automata (QCA), and NanoMagnetic Logic (NML). We find that the wave pipelined version of the netlists have an improvement in throughput over power of 23×, 13×, and 5× for SWD, QCA, and NML, respectively. In terms of throughput over area ratio, the improvement is 5×, 8×, and 3×, respectively.

Wide operating window spin-torque majority gate towards large-scale integration of logic circuits

“…The fan-out is restricted to three but this constraint has been implemented in circuit synthesis. 30,31 As a consequence, we have showcased all the building blocks required for logic synthesis. In addition, we have shown that STMG-based circuits work independently of the initial magnetic state.…”

Retiming for high-performance superconductive circuits with register energy minimization

“…There are different types of cells in this library: DC2SFQ, SFQ2DC, PTL driver/receiver, NDRO (nondestructive readout flip-flop), Splitter, NOT, DFF, two-input AND, two-input OR, and two-input XOR. An SFQ cell can only drive one other cell because of the physical limitations of Josephson junctions (JJs) [9][10][11]. The first input of the NDRO cell is "set" whereas the second input is "reset".…”

“…However, with the approaching end of Moore's law, researchers have started exploring promising non-CMOS technologies for building high-performance and energy-efficient systems. The circuits built with non-CMOS technologies generally encompass an enormous number of registers or buffer cells due to the physical limitations of fundamental devices [9][10][11]. This unique characteristic motivates researchers to reevaluate the possibility of generalizing or even advancing retiming for evolving non-CMOS applications [12,13].…”

Spin Wave Based Full Adder

“…At the circuit level, dedicated operators for neuromorphic applications were developed in [14], [15]; examples are upper and lower threshold operators, truncated difference operators, literal operators, cyclic operators and minimum and maximum operators. In addition, exploring the concept of wave pipelining based operation was illustrated in [16]. Further, design for arithmetic operation such as FA was explained in [17].…”