Wavelength-Striped Multicasting of Optically-Connected Memory for Large-Scale Computing Systems

Brunina, Daniel; Lai, Caroline P.; Garg, Ajay S.; Bergman, Keren

doi:10.1364/ofc.2011.owh4

Cited by 2 publications

(4 citation statements)

References 4 publications

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“…Replacement of the point-to-point memory link with a network configuration maximizes the scalability of our memory system by greatly expanding the memory address space. The optical network can also add new functionality to the memory system, such as memory multicasting [22], where a single memory transaction can multicast from one processor to multiple memory nodes, or the ability to dynamically reconfigure the memory visible to a given processor.…”

Section: Experimental Demonstration and Resultsmentioning

confidence: 99%

“…The network nodes can be configured to support wavelengthstriped payload multicasting to enable access to multiple OCM nodes simultaneously [22]. A processor node can store data at multiple OCM nodes simultaneously with a single memory access, thereby distributing data locally to other processing nodes for distributed computing.…”

Section: E Architectural Analysis and Discussionmentioning

confidence: 99%

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Building Data Centers With Optically Connected Memory

Brunina¹,

Lai

Garg

et al. 2011

J. Opt. Commun. Netw.

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Abstract-Future data centers will require novel, scalable memory architectures capable of sustaining high bandwidths while still achieving low memory access latencies. Electronic interconnects cannot meet the challenges presented by the need for multi-terabit off-chip memory data paths. In this work, the electronic bus between main memory and its host processor is replaced with a circuit-switched optical interconnection network. We investigate the impact of our optically connected memory system on large-scale architectures and experimentally validate the protocol using field-programmable gate array based processor nodes and a custom-designed memory controller. The processor communicates all-optically with multiple synchronous dynamic random access memory nodes using 4×2.5-Gb/s wavelength-striped payloads, operating error free with bit-error rates less than 10 −12 .

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Section: Experimental Demonstration and Resultsmentioning

confidence: 99%

Section: E Architectural Analysis and Discussionmentioning

confidence: 99%

Building Data Centers With Optically Connected Memory

Brunina¹,

Lai

Garg

et al. 2011

J. Opt. Commun. Netw.

Self Cite

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show abstract

“…OCM can replace the point-to-point links between a processor and its memory modules with a multicast-capable optical interconnection network ( Fig. 1), exploiting the distance immunity of optics to allow each processor to address a vast number of OCM nodes [12]. High-bandwidth communication links with multiple OCM devices can be established in parallel to allow processors to attain unprecedented bandwidths without sacrificing sensitive memory access latency.…”

Section: Introductionmentioning

confidence: 99%

“…An OCM-enabled approach can protect against the failure of an entire OCM node, as opposed to only a single SDRAM chip in the case of an advanced ECC scheme using electronic interconnects. Optical multicasting further reduces latency and eliminates the need for power-hungry buffering and reordering at the processor, thus creating overall higher performance and a more resilient memory system [12].…”

Section: Introductionmentioning

confidence: 99%

Resilient Optically Connected Memory Systems Using Dynamic Bit-Steering [Invited]

Brunina

Lai

Liu

et al. 2012

J. Opt. Commun. Netw.

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Abstract-Resilience is becoming an increasingly critical performance requirement for future large-scale computing systems. In data center and high-performance computing systems with many thousands of nodes, errors in main memory can be a significant source of failures. As a result, large-scale memory systems must employ advanced error detection and correction techniques to mitigate failures. Memory devices are primarily designed for density, optimizing memory capacity and throughput, rather than resilience. A strict focus on memory performance instead of resilience risks undermining the overall stability of next-generation computers. In this work, we leverage an optically connected memory system to optimize both memory performance and resilience. A multicast-capable optical interconnection network replaces the traditional electronic bus between a processor and its main memory, allowing for a novel error-correction technique based on dynamic bit-steering. As compared to an electronically connected approach, we demonstrate significantly higher memory bandwidths and reduced latencies, in addition to a 700× improvement in resilience.

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Wavelength-Striped Multicasting of Optically-Connected Memory for Large-Scale Computing Systems

Abstract: Abstract:We demonstrate the broadband multicasting of optically-connected memory between multiple SDRAM nodes and an emulated microprocessor on an optical network test-bed. 4×2.5-Gb/s wavelength-striped memory messages are multicasted error-free (BER<10 -12 ).

Cited by 2 publications

References 4 publications

Building Data Centers With Optically Connected Memory

Building Data Centers With Optically Connected Memory

Resilient Optically Connected Memory Systems Using Dynamic Bit-Steering [Invited]

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