Dielectric layers within III-nitride transistor technology can act either as passivation layers or as gate-dielectric layers. In this paper, we reflect on both issues and present novel approaches of dielectric schemes. In both cases, the elimination of surface traps or, more generally, of surface states is a key issue in obtaining improved device performance. As gate dielectrics, we introduced and investigated thermally and photoelectrochemically generated Al x Ga 2-x O 3 , SiO 2 , the combination of Al x Ga 2-x O 3 and SiO 2 (tandem-dielectric stack), and e-beam-deposited Al 2 O 3 . These dielectric layers serve simultaneously as a passivation layer. In addition, we introduced plasma-enhanced chemical-vapor deposition (PECVD)-deposited SiN x for passivation. The results highlight the importance of passivation and the introduction of gate dielectrics and emphasize the relationship between surface states and improved direct-current (DC) performance. Backed by additional measurements, we propose a different gateleakage mechanism for heterostructure field-effect transistor (HFET) and metal-oxide semiconductor heterostructure field-effect transistor (MOSHFET) devices.