Whole-system persistence

Narayanan, Dushyanth; Hodson, Orion

doi:10.1145/2150976.2151018

Cited by 179 publications

(40 citation statements)

References 22 publications

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“…To avoid the need for additional cache-level hardware support [10] or the need to replace volatile with nonvolatile caches [32], NV-Logging takes advantage of wellknown hardware instructions to implement its consistency and persistence mechansims: (1) the clflush instruction supported in most processors flushes specified cache lines out to memory; (2) the mfence instruction is a hardware memory barrier that enforces the ordering of memory operations. An alternative solution is whole-system persistence [23], which can make the entire memory persistent upon failure. With hardware that has sufficient backup power sources, NVLogging can also achieve high performance with a flush-onfailure policy.…”

Section: Logging Persistencementioning

confidence: 99%

NVRAM-aware logging in transaction systems

2014

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Emerging byte-addressable, non-volatile memory technologies (NVRAM) like phase-change memory can increase the capacity of future memory systems by orders of magnitude. Compared to systems that rely on disk storage, NVRAMbased systems promise significant improvements in performance for key applications like online transaction processing (OLTP). Unfortunately, NVRAM systems suffer from two drawbacks: their asymmetric read-write performance and the notable higher cost of the new memory technologies compared to disk. This paper investigates the cost-effective use of NVRAM in transaction systems. It shows that using NVRAM only for the logging subsystem (NV-Logging) provides much higher transactions per dollar than simply replacing all disk storage with NVRAM. Specifically, for NV-Logging, we show that the software overheads associated with centralized log buffers cause performance bottlenecks and limit scaling. The per-transaction logging methods described in the paper help avoid these overheads, enabling concurrent logging for multiple transactions. Experimental results with a faithful emulation of future NVRAM-based servers using the TPCC, TATP, and TPCB benchmarks show that NV-Logging improves throughput by 1.42 -2.72x over the costlier option of replacing all disk storage with NVRAM. Results also show that NV-Logging performs 1.21 -6.71x better than when logs are placed into the PMFS NVRAM-optimized file system. Compared to state-of-theart distributed logging, NV-Logging delivers 20.4% throughput improvements.

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Section: Logging Persistencementioning

confidence: 99%

NVRAM-aware logging in transaction systems

2014

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“…A cache line flush after every store to persistent memory followed by a fenced PCOMMIT can be used to ensure the ordering of writes into persistent memory. However, a failure within the atomic section will still leave the memory in an inconsistent state, and additional complex hardware mechanisms [1] to precisely restart the system are needed for recovery.…”

Section: Overviewmentioning

confidence: 99%

“…The flush software primitive proposed in [8] facilitates software control of update order. Ordering updates alone cannot guarantee atomicity of a sequence of updates, without a snapshot of the entire micro architectural state at the point of a failure [1]. A non-volatile victim cache to provide transactional buffering was proposed in [9], with the added property of not requiring logging; by comparison, our approach achieves efficiency through non-temporal write-combining streaming of log records.…”

Section: Related Workmentioning

confidence: 99%

Non-Intrusive Persistence with a Backend NVM Controller

Doshi

Giles

et al. 2016

IEEE Comput. Arch. Lett.

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Abstract-By providing instruction-grained access to vast amounts of persistent data with ordinary loads and stores, byte-addressable storage class memory (SCM) has the potential to revolutionize system architecture. We describe a non-intrusive SCM controller for achieving light-weight failure atomicity through back-end operations. Our solution avoids costly software intervention by decoupling isolation and concurrency-driven atomicity from failure atomicity and durability, and does not require changes to the front-end cache hierarchy. Two implementation alternatives -one using a hardware structure, and the other extending memory controller with a firmware managed volatile space, are described.

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“…Several works tried to mitigate the ordering overhead in persistent memory with hardware support [10,32,33,34,35]. These can be classified into two approaches:…”

Section: Mitigating the Ordering Overheadmentioning

confidence: 99%

“…Kiln also uses the NV-LLC as the log to eliminate the need to perform multiple writes in main memory. Whole-system persistence [35] takes this approach to the extreme by making all levels of the CPU cache non-volatile. The approach we develop in this paper, LOC, is complementary to the approach of employing NV caches.…”

Section: Mitigating the Ordering Overheadmentioning

confidence: 99%

Loose-Ordering Consistency for persistent memory

Shu

Sun

et al. 2014

2014 IEEE 32nd International Conference on Computer Design (ICCD)

124

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Abstract-Emerging non-volatile memory (NVM) technologies enable data persistence at the main memory level at access speeds close to DRAM. In such persistent memories, memory writes need to be performed in strict order to satisfy storage consistency requirements and enable correct recovery from system crashes. Unfortunately, adhering to a strict order for writes to persistent memory significantly degrades system performance as it requires flushing dirty data blocks from CPU caches and waiting for their completion at the main memory in the order specified by the program. This paper introduces a new mechanism, called Loose-Ordering Consistency (LOC), that satisfies the ordering requirements of persistent memory writes at significantly lower performance degradation than stateof-the-art mechanisms. LOC consists of two key techniques. First, Eager Commit reduces the commit overhead for writes within a transaction by eliminating the need to perform a persistent commit record write at the end of a transaction. We do so by ensuring that we can determine the status of all committed transactions during recovery by storing necessary metadata information statically with blocks of data written to memory. Second, Speculative Persistence relaxes the ordering of writes between transactions by allowing writes to be speculatively written to persistent memory. A speculative write is made visible to software only after its associated transaction commits. To enable this, our mechanism requires the tracking of committed transaction ID and support for multi-versioning in the CPU cache. Our evaluations show that LOC reduces the average performance overhead of strict write ordering from 66.9% to 34.9% on a variety of workloads.

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Whole-system persistence

Cited by 179 publications

References 22 publications

NVRAM-aware logging in transaction systems

NVRAM-aware logging in transaction systems

Non-Intrusive Persistence with a Backend NVM Controller

Loose-Ordering Consistency for persistent memory

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