Wideband TV White Space Transceiver Design and Implementation

Abstract

For transceivers operating in television white space (TVWS), frequency agility and strict spectral mask fulfillments are vital. In the U.K., TVWS covers a 320-MHz-wide frequency band in the UHF range, and the aim of this brief is to present a wideband digital up-and downconverter for this scenario. Sampling at radio frequency (RF), a two-stage digital conversion is presented, which consists of a polyphase filter (PPF) for implicit upsampling and decimation, and a filter-bank-based multicarrier approach to resolve the 8-MHz channels within the TVWS band. We demonstrate that the up-and downconversion of 40 such channels is hardly more costly than that of a single channel. Appropriate filter design can satisfy the mandated spectral mask and control the reconstruction error. A field-programmable gate array implementation is discussed, capable of running the wideband transceiver on a single Virtex-7 device with sufficient word length to preserve the spectral mask requirements of the system.

Energy-efficient implementation of a wideband transceiver system with per-band equalisation and synchronisation

“…This section outlines the transceiver radio front-end [2], which aims to up-and downconvert any or all of the 40 channels in the UK's TVWS spectrum. The overall design idea is described in Sec.…”

“…In the FBMC transceiver, as summarised in [2] and shown in Fig. 1, the upper branch represents the transmitter (TX) and the lower branch the receiver (RX).…”

“…1. Two-stage TVWS filter bank TX (above) and RX (below) with a polyphase filter (PPF) in stage 1 and an FBMC system in stage 2, as proposed in [2]. aliasing after decimation f synchronisation and equalisation to be discussed in the next section.…”

“…Therefore, because of the need for frequency-agile transceivers with a strict spectral mask requirements [1], we have previously opted for a filter-bank based multicarrier (FBMC) approach, which relies on an oversampled discrete Fourier transform (DFT) filter bank. This approach is numerically efficient, as it permits the potential upand downconversion of all 40 channels at the cost of a single channel transceiver with only a small overhead [2].…”

“…Even in the absence of channel dispersion and issues such as carrier frequency and phase offsets, such a system still requires careful timing synchronisation [6]. Therefore, in order to moving the transceiver system from [2] closer to realisation, this paper aims to demonstrate that a robust and energy efficient synchronisation / equalisation approach can be incorporated into the transceiver design of [2] running on a Xilinx Virtex 7 field programmable gate array (FPGA).…”