Work Function Engineering With Linearly Graded Binary Metal Alloy Gate Electrode for Short-Channel SOI MOSFET

Threshold voltage modeling and performance comparison of a novel linearly graded binary metal alloy gate junctionless double gate metal oxide semiconductor field effect transistor

“…5). The presence of a finite gradual slope in the potential profile is advantageous over its abrupt change (in case of DMG) similar to other works [15,19]. However, the WFEG effect restores the potential symmetry in ultra nano dimension in contrast to the other conventional MOS structures, as reflected in Fig.…”

“…This concept employs dual or triple material gate amalgamated together forming a single gate electrode thereby modifying the overall channel electric field by suitably adjusting the vertical electric field [14]. This innovative idea can be improvised to a further extent by introducing a binary metal alloy (A a B 1-a ) as gate electrode having continuous lateral concentration variation from source side (100 % A) to drain side (100 % B) [15][16][17][18]. The vertical electric field and consequently the overall field in Si channel is altered by continuous variation of gate work function, which effectively restores the asymmetrical surface potential profile in nano scale devices, thereby improving the device performance significantly due to a careful control of unwanted drain induced barrier lowering (DIBL) effect.…”

Quantum analytical modeling and simulation of CNT on insulator (COI) and CNT on nothing (CON) FET: a comparative analysis

“…This needed an optimization between ultra high speed and ultra low power consumption in making denser circuits [2][3][4][5][6]. But lowering dimensions indeed lowers the control of gate over the channel as lateral electric field turns to be significantly larger than the vertical electric field which in consequence invokes degradation of device performance including DIBL, gate tunnelling, threshold voltage roll-off, hot carrier effect [2][3][4][5]7] etc. Therefore to suppress those undesired phenomena as well as to design the device in such away it can operate faster, researchers moved forward with the discovery of non-classical structures.…”

“…Fully depleted silicon on insulator (FDSOI) was a device [6] with buried oxide layer to minimize electrostatic coupling, better subthreshold behaviour, and reduced junction capacitance gaining higher speed of operation. But FDSOI [2,3] suffered a lot from accumulation of positive charges at the buried layer. That is why a little rectification was done to the device structure by replacing thick oxide with embedded air gap to form silicon on nothing (SON) MOSFET [2,5,8] keeping all the advantages of SOI structure unaffected.…”

Influence of mole fraction variation of binary metal gate on SON MOSFET device performance

“…Research works have demonstrated that the threshold voltage can be suitably tuned by controlling the mole fraction ratio if binary metal gate is employed instead of single metal gate [3]. With a proper composition of high and low work function metals, the work function of the metal alloys can be modulated from 4.16 eV to 5.05 eV continuously.…”