Workflow on CNN utilization and inference in FPGA for embedded applications: 6th South-East Europe Design Automation, Computer Engineering, Computer Networks and Social Media Conference (SEEDA-CECNSM 2021)

A mega constellation of Nano/microsatellites is the contemporary solution for global-level Earth observation demands. However, as most of the images taken by Earth-observing satellites are covered by clouds, storing and downlinking these images results in inefficient utilization of scarce onboard resources and bandwidth. In addition, the trend of making satellite task execution plans by ground operators demands the efforts of experts or simulators to predict the real-time situation of satellites and to decide which tasks should be executed next. Granting controlled autonomy to satellites to perform onboard tasks will boost mission effectiveness. We experimented with granting controlled autonomy for satellites in performing onboard image classification and task scheduling. We designed a convolutional neural network-based binary image classification model with more than 99% accuracy in classifying clear and cloudy images. The model is configured to perform inference in low-performance computers of ordinary Cubesats. Moreover, we designed an autonomous satellite task scheduling mechanism based on reinforcement learning. It performs better than a custom heuristic-based method in scheduling onboard tasks. As a result, the proposed classification and scheduling techniques with machine learning ensured efficient utilization of onboard memory, power, and bandwidth in the highly resource-constrained CubeSat platforms and mission accomplishment of Nano/microsatellite constellations.

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Efficient Edge-AI Application Deployment for FPGAs

Kalapothas

Flamis

Kitsos

2022

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Field Programmable Gate Array (FPGA) accelerators have been widely adopted for artificial intelligence (AI) applications on edge devices (Edge-AI) utilizing Deep Neural Networks (DNN) architectures. FPGAs have gained their reputation due to the greater energy efficiency and high parallelism than microcontrollers (MCU) and graphical processing units (GPU), while they are easier to develop and more reconfigurable than the Application Specific Integrated Circuit (ASIC). The development and building of AI applications on resource constraint devices such as FPGAs remains a challenge, however, due to the co-design approach, which requires a valuable expertise in low-level hardware design and in software development. This paper explores the efficacy and the dynamic deployment of hardware accelerated applications on the Kria KV260 development platform based on the Xilinx Kria K26 system-on-module (SoM), which includes a Zynq multiprocessor system-on-chip (MPSoC). The platform supports the Python-based PYNQ framework and maintains a high level of versatility with the support of custom bitstreams (overlays). The demonstration proved the reconfigurabibilty and the overall ease of implementation with low-footprint machine learning (ML) algorithms.

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Workflow on CNN utilization and inference in FPGA for embedded applications: 6th South-East Europe Design Automation, Computer Engineering, Computer Networks and Social Media Conference (SEEDA-CECNSM 2021)

Cited by 3 publications

References 15 publications

A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA

A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA

A New Strategy of Satellite Autonomy with Machine Learning for Efficient Resource Utilization of a Standard Performance CubeSat

Efficient Edge-AI Application Deployment for FPGAs

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