Workstation MCM technology comparison with five designs

Abstract

A ten-chip, high-performance workstation multichip module, implemented in MCM-D technology, was redesigned utilizing three ceramic technologies-Fodel? D flusion PatterningT? and low temperature cofired ceramic-and one laminate-based approach.This paper shows the size, speed, thermal performance, and cost impacts of implementing the workstation module in the Jive diferent technologies.A detailed explanation of the factors driving module size in each technology is shown: wirebond fanout patterns, trace pitch, via densiw, and substrate to PCB interconnection.Over 100 simulation runs which looked at the performance of critical address, control, and data lines were conducted. A metric for comparing module performance for the workstation module is presented with results for each technology.The cost of each of thejve design options is detailed The paper concludes with a summay of the general applicability of each technology..The first phase of any MCM design requires engineers to address three key product issues: size, performance, and cost. The choice of MCM technology affects these characteristics more than any other factor.Workstations present some of the greatest challenges to MCM designers because they are quite sensitive to both performance and cost. Workstation processor die and cache controller die have hundreds of 1/0 pads on very tight pitches. Clocks are fast and getting faster. Costs are under increasing pressures.Traditionally, thin film is thought of as the technology of choice for workstation applications. While workstation density and performance needs map to the strengths of thin film, cost concerns raise the question "will other approaches work?" Three ceramic alternatives show promise. Two thick film processes, Diffusion PatterningTM and Fodel*, deliver densities approaching thin film while leveraging the low cost and wide availability of hybrid technology.Green TapeTM is a low temperature co-fired ceramic alternative that can be manufactured at competitive costs in high layer counts.Finally, the thin film and ceramic designs are contrasted to ball grid array (BGA) packaged die on printed wiring boards.This study was conducted to understand the suitability of different packaging alternatives in demanding applications.Using the SuperSPARC chip set as the benchmark, all five design implementations are compared on the basis of size, performance, and cost. 0-7803-3787-5/97 $5.00 01 997 IEEE