2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) 2016
DOI: 10.1109/micro.2016.7783718
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Zorua: A holistic approach to resource virtualization in GPUs

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Cited by 49 publications
(38 citation statements)
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“…No CTAs will be dispatched to an SM if one of these resources is insufficient to support a new CTA. We now describe these TLP-related structures in more detail, as previously detailed in the literature [5], [29], [44], [52]. Register file: The maximum number of concurrent threads per SM is a function of register file capacity on the one hand, and the number of registers allocated per thread on the other hand.…”
Section: Tlp-related Hardware Structuresmentioning
confidence: 99%
See 3 more Smart Citations
“…No CTAs will be dispatched to an SM if one of these resources is insufficient to support a new CTA. We now describe these TLP-related structures in more detail, as previously detailed in the literature [5], [29], [44], [52]. Register file: The maximum number of concurrent threads per SM is a function of register file capacity on the one hand, and the number of registers allocated per thread on the other hand.…”
Section: Tlp-related Hardware Structuresmentioning
confidence: 99%
“…Warp slots: The number of warp slots is the third resource that may limit the maximum number of CTAs per SM [44], [52]. As mentioned before, a warp is the basic unit to schedule and issue instructions on a GPU.…”
Section: Tlp-related Hardware Structuresmentioning
confidence: 99%
See 2 more Smart Citations
“…The initial workload characterization phase works because although GPU applications exhibit phase behavior at the warp level [18,19], this gets leveled out as several TBs execute concurrently [20]. After the classification phase, CD-search chooses to enter the performance mode or the power mode.…”
Section: Classification-driven Searchmentioning
confidence: 99%