ZPL: a machine independent programming language for parallel computers

Chamberlain, Bradford L.; Choi, Sung‐Eun; Lewis, Carol; Lin, Calvin; Snyder, Lawrence; Weathersby, W.D.

doi:10.1109/32.842947

Cited by 48 publications

(28 citation statements)

References 33 publications

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“…Vector Pascal [4,2] is an array language and as such shares features from other array languages such as APL [5], ZPL [6,7,8], Distributed Array Processor Fortran [9], Fortan90 [10] or Single 2 M. CHIMEH, W.P. COCKSHOTT, S.B.…”

Section: Previous Related Workmentioning

confidence: 99%

Compiling Vector Pascal to the XeonPhi

Chimeh

Cockshott

Oehler

et al. 2015

Concurrency and Computation

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SUMMARYIntel's Xeon Phi is a highly parallel x86 architecture chip made by Intel. It has a number of novel features which make it a particularly challenging target for the compiler writer. This paper describes the techniques used to port the Glasgow Vector Pascal Compiler (VPC) to this architecture and assess its performance by comparisons of the Xeon Phi with 3 other machines running the same algorithms. Copyright c 0000 John Wiley & Sons, Ltd. Nvidia GPU CONTEXTThis work was done as part of the EU funded CLOPEMA project whose aim is to develop a cloth folding robot using real time stereo vision. At the start of the project we used a Java legacy software package, C3D [1] that is capable of performing the necessary ranging calculations. When processing the robot's modern high resolution images it was prohibitively slow for real time applications, taking about 20 minutes to process a single pair of images.To improve performance, a new Parallel Pyramid Matcher (PPM) was written in Vector Pascal [2] † , using the legacy software as design basis. The new PPM allowed the use of both SIMD and multi-core parallelism [3]. It performs about 20 times faster on commodity PC chips such as the Intel Sandybridge, than the legacy software. With the forthcoming release of the Xeon Phi it was anticipated to be able to obtain further acceleration running the same PPM code on the Xeon Phi. Hence, taking advantage of more cores and wider SIMD registers, whilst relying on the automatic parallelisation feature of the language. The key step in this would be to modify the compiler to produce Xeon Phi code. However, the Xeon Phi turned out to be considerably more complex compared to previous Intel platforms. Porting of the Glasgow Vector Pascal compiler became an entirely new challenge, and required a different porting approach than previous architectures. PREVIOUS RELATED WORKVector Pascal [4,2] is an array language and as such shares features from other array languages such as APL [5], ZPL [6,7,8] Assignment C [11,12]. The original APL and its descendent J were interpretive languages in which each application of a function to array arguments produced an array result. Whilst it is possible to naively generate a compiler that uses the same approach it is considered inefficient as it leads to the formation of an unnecessary number of array temporaries. This reduces locality of reference and thus cache performance. The key innovation in efficient array language compiler development was Budd's [13] principle to create a single loop nest for each array assignment and to create temporaries as scalar results. This principle was subsequently rediscovered by other implementers of data parallel languages or sub-languages [14]. It has been used in the Saarbrucken [15] Note that the # notation is not supported. Instead index sets are usually elided, provided that the corresponding positions in the arrays are intended. If offsets are intended the index sets can now be explicitly referred to using the predeclared array of index sets iota. iota[0] ...

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Section: Previous Related Workmentioning

confidence: 99%

Compiling Vector Pascal to the XeonPhi

Chimeh

Cockshott

Oehler

et al. 2015

Concurrency and Computation

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“…Titanium's multidimensional array library was inspired by the dense and strided regions and arrays in ZPL [7], which also inspired Chapel's domain and array library. Unlike in Chapel, the elements of a Titanium array are located in a single memory space, though they may be accessed from a remote processor.…”

Section: Background and Related Workmentioning

confidence: 99%

A Local-View Array Library for Partitioned Global Address Space C++ Programs

Kamil

Yelick

2014

Proceedings of ACM SIGPLAN International Workshop on Libraries, Languages, and Compilers for Array Programming

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Multidimensional arrays are an important data structure in many scientific applications. Unfortunately, built-in support for such arrays is inadequate in C++, particularly in the distributed setting where bulk communication operations are required for good performance. In this paper, we present a multidimensional library for partitioned global address space (PGAS) programs, supporting the one-sided remote access and bulk operations of the PGAS model. The library is based on Titanium arrays, which have proven to provide good productivity and performance. These arrays provide a local view of data, where each rank constructs its own portion of a global data structure, matching the local view of execution common to PGAS programs and providing maximum flexibility in structuring global data. Unlike Titanium, which has its own compiler with array-specific analyses, optimizations, and code generation, we implement multidimensional arrays solely through a C++ library. The main goal of this effort is to provide a library-based implementation that can match the productivity and performance of a compiler-based approach. We implement the array library as an extension to UPC++, a C++ library for PGAS programs, and we extend Titanium arrays with specializations to improve performance. We evaluate the array library by porting four Titanium benchmarks to UPC++, demonstrating that it can achieve up to 25% better performance than Titanium without a significant increase in programmer effort.

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“…Because data partition is difficult to perform automatically, several programming models [17][18][19][20] were proposed to help programmers annotate on source code to specify data partition. We borrowed a subset of these annotations, and applied them to CUDA-Zero.…”

Section: Related Workmentioning

confidence: 99%

“…This is done by analyzing the access pattern of each array in the kernel functions. This problem has been addressed by a good many prior works [13][14][15][17][18][19], and is proved to be difficult. Most prior approaches either suffer from too much communication overhead, or require heavy user annotation to tell the compiler how to partition the data.…”

Section: Data Decompositionmentioning

confidence: 99%

CUDA-Zero: a framework for porting shared memory GPU applications to multi-GPUs

Chen

Zheng

2012

Sci. China Inf. Sci.

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As the prevalence of general purpose computations on GPU, shared memory programming models were proposed to ease the pain of GPU programming. However, with the demanding needs of more intensive workloads, it's desirable to port GPU programs to more scalable distributed memory environment, such as multi-GPUs. To achieve this, programs need to be re-written with mixed programming models (e.g. CUDA and message passing). Programmers not only need to work carefully on workload distribution, but also on scheduling mechanisms to ensure the efficiency of the execution. In this paper, we studied the possibilities of automating the process of parallelization to multi-GPUs. Starting from a GPU program written in shared memory model, our framework analyzes the access patterns of arrays in kernel functions to derive the data partition schemes. To acquire the access pattern, we proposed a 3-tiers approach: static analysis, profile based analysis and user annotation. Experiments show that most access patterns can be derived correctly by the first two tiers, which means that zero efforts are needed to port an existing application to distributed memory environment. We use our framework to parallelize several applications, and show that for certain kinds of applications, CUDA-Zero can achieve efficient parallelization in multi-GPU environment.

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ZPL: a machine independent programming language for parallel computers

Cited by 48 publications

References 33 publications

Compiling Vector Pascal to the XeonPhi

Compiling Vector Pascal to the XeonPhi

A Local-View Array Library for Partitioned Global Address Space C++ Programs

CUDA-Zero: a framework for porting shared memory GPU applications to multi-GPUs

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