No abstract

The Superconducting Integrated Receiver (SIR) comprises in one chip a planar antenna integrated with an SIS mixer, a superconducting Flux Flow Oscillator (FFO) acting as Local Oscillator (LO) and a second SIS harmonic mixer (HM) for FFO phase locking. Free-running FFO linewidth well below 10 MHz is required to ensure phase-locked operation of an SIR. Comprehensive experimental study of the Nb-AlOx-Nb FFO linewidth and other main parameters has been carried out in order to achieve this goal. Essential dependence of the FFO linewidth on its width and idle region dimension has been found. It makes possible an optimization of the FFO design and selection of the best FFO parameters for practical operation of the SIR.

The Superconducting Integrated Receiver (SIR) comprising in one chip a superconductor-insulator-superconductor (SIS) mixer and a phase-locked superconducting Flux Flow Oscillator (FFO) is under development for the international project TELIS. To overcome temperature constraints and extend operation frequency of the SIR we have developed and studied Nb-AlN-NbN-Nb circuits with a gap voltage Vg up to 3.7 mV and extremely low leakage currents (Rj Rn 30). Based on these junctions integrated microcircuits comprising FFO and harmonic mixer have been designed, fabricated and tested; the radiation from such circuits has been measured at frequencies up to 700 GHz. Employment of NbN electrode does not result in the appearance of additional noise. For example, FFO linewidth as low as 1 MHz was measured at 600 GHz, that allows us to phase lock up to 92% of the emitted by FFO power and realize very low phase noise about 90 dBc. Preliminary results demonstrated uncorrected DSB noise temperature of the Nb-AlN-NbN SIR below 250 K at frequencies around 600 GHz.