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We describe on-chip circuits specially designed and fabricated for the purpose of measuring the effect of AC NBTI on an individual, well-defined device in the wide frequency range on a single wafer. The circuits are designed to allow measurements in multiple modes, specifically, DC and AC NBTI (both interrupted and on-the-fly), on a single pFET and on a CMOS inverter, as well as charge-pumping characterization of the stressed pFET. The results indicate that AC NBTI is independent of the frequency in the 1 Hz -2 GHz range. The voltage and stress time acceleration is observed to be identical for both AC and DC NBTI stress.

V t -mismatch, and thus SRAM scalability, is greatly improved in narrow SOI FinFETs, with respect to planar bulk, because of their undoped channel and near-ideal gate control.We show by simulations and by measurements that in FinFETs, unlike planar bulk, β-mismatch becomes dominant, leading to radically different SRAM characteristics. By careful process tuning, we demonstrate a substantial reduction in β-mismatch. We show the impact of this novel mismatch behavior on SRAM performance and yield under various optimization strategies and thereby provide guidelines for SRAM design in a FinFET technology.

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