We propose in this paper a testing method for CMOS circuits that is insensitive to process variations and leakage levels. This method is based on the tramient supply current ( i~~~) and on the observation that current levels f o r different circuits on a chip scale with different runs of the process. In this method, we introduce a very simple test circuit on-chip. Then, we apply a normalization procedure that allows us to use a single thresholdfor all chips in dif ferent processes without prior knowledge of the process to which the circuit under test belongs. Resultsfrom various circuits show that the method is capable of improving the detection capability of threshold-based iDDr testing forfaults that would othenvise go undetected due to leakage andprocess variation.

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