No abstract

A post-complementary metal oxide semiconductor (CMOS) compatible microfabrication process of piezoelectric cantilevers has been developed. The fabrication process is suitable for standard silicon technology and provides low-cost and high-throughput manufacturing. This work reports design, fabrication and characterization of piezoelectric cantilevers based on aluminum nitride (A1N) thin films synthesized at room temperature. The proposed microcantilever system is a sandwich structure composed of chromium (Cr) electrodes and a sputtered A1N film. The key issue for cantilever fabrication is the growth at room temperature of the A1N layer by reactive sputtering, making possible the innovative compatibility of piezoelectric MEMS devices with CMOS circuits already processed. A1N and Cr have been etched by inductively coupled plasma (ICP) dry etching using a BCl3-Cl2-Ar plasma chemistry. As part of the novelty of the post-CMOS micromachining process presented here, a silicon Si (100) wafer has been used as substrate as well as the sacrificial layer used to release the microcantilevers. In order to achieve this, the Si surface underneath the structure has been wet etched using an HNA (hydrofluoric acid + nitric acid + acetic acid) based solution. X-ray diffraction (XRD) characterization indicated the high crystalline quality of the A1N film. An atomic force microscope (AFM) has been used to determine the Cr electrode surface roughness. The morphology of the fabricated devices has been studied by scanning electron microscope (SEM). The cantilevers have been piezoelectrically actuated and their out-of-plane vibration modes were detected by vibrometry.

No abstract

The aim of this work is to simulate and optically characterize the piezoelectric performance of CMOS (complementary metal oxide semiconductor) compatible microcantilevers based on aluminium nitride (A1N) and manufactured at room temperature. This study should facilitate the integration of piezoelectric micro-electromechanical systems (MEMS) devices such as microcantilevers, in CMOS technology.Besides compatibility with standard integrated circuit (IC) manufacturing procedures, low temperature processing also translates into higher throughput and, as a consequence, lower manufacturing costs. Thus, the use of the piezoelectric properties of A1N manufactured by reactive sputtering at room temperature is an important step towards the integration of this type of devices within future CMOS technology standards. To assess the reliability of our fabrication process, we have manufactured arrays of free-standing microcantilever beams of variable dimension and studied their To complete the study, X-Ray diffraction as well as d 33 piezoelectric coefficient measurements were also carried out.

This report shows different fabrication procedures followed to obtain piezoelectric microcantilevers. The proposed microcantilever is a sandwich structure composed of chromium (Cr) electrodes (from 50 to 300-nm thick) and a reactive sputtered piezoelectric aluminum nitride (AlN) thin film (from 350 nm to 600-nm thick). The microcantilevers top-view dimensions ranged from 50 to 300 µm in width and from to 250 to 700 µm in length. Severalmaterials such as nickel silicide and nickel, as well as a photoresist, and finally the silicon substrate surface have been investigated to discern their possibilities and limitations when used as sacrificial layers. These materials have been studied to determine the optimal processing steps and chemistries required for each of them. The easiest and the only successful microcantilevers release was finally obtained using the top silicon substrate surface as a sacrificial layer. The structural and morphological characteristics of the microcantilevers are presented as well as their piezoelectric character. The main difference of this work resides in the Si surface-based microcantilever release technique. This, along with the synthesis of AlN at room temperature by reactive sputtering, establishes a manufacturing procedure for piezoelectric microbeams, which makes possible the integration of such MEMS devices into postCMOS technology