In this paper, we propose a new power generating circuit for passive ultra high frequency (UHF) RFID tag. The proposed power generating circuit consists of a RF limiter, a high power efficiency and high sensitivity full wave radio frequency (RF) wave rectifier and a low-power regulator with NMOS diodes work like a DC-limiter. The design method proposed in this study use one low drop out (LDO) regulator to provide tow output stable supply voltages vdd1 of value 1V for the digital section supply, and vdd2 of value 0.5V for the analog front-end section power supply. The proposed power generating circuit is optimized in terms of power consumption of RFID tag system to have a high operating range under conditions of 50 Ohm antenna, -24 dBm input RF power, 900MHz and 1 M DC, with low power dissipation and 29.15% large power conversion efficiency. The power generating circuit was designed, simulated and layouted in Cadence using TSMC 180 nm technology. The final design occupies approximately 0.25mm².

<p>In this work a 2 MHz on-off keying (OOK) transmitter/receiver for inductive power and data transmission for biomedical implant system is presented. Inductive link, driven by a Class E power amplifier (PA) is the most PA used to transfer data and power to the internal part of biomedical implant system. Proposed transmitter consists of a digital control oscillator (DCO) and a class E PA which uses OOK modulation to transfer both data and power to a biomedical implant. In proposing OOK transmitter when the transmitter sends binary value “0” the DCO and PA are turned off. With this architecture and 2 MHz carrier wave we have implemented a wireless data and power transfer link which can transmit data with data rate 1Mbps and bit error rate (BER) of 10-5. The efficiency of power transfer is 42% with a 12.7 uH transmitter coil and a 2.4 uH receiver coil and the power delivered to the load is about 104.7 mW. Proposed transmitter is designed for output power 4.1V. OOK receiver consists of an OOK demodulator, powered by rectified and regulated 5V p-p RF signal across the receiver coil. The supply voltage of proposed voltage regulator is 5 V with 9mV/V line regulation of. All circuits proposed in this paper were designed and simulated using Cadence in 0.18 um CMOS process.</p>

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In this paper, we aim to make a detailed study on the evaluation and the characteristics of the non-inverting buck–boost converter. In order to improve the behaviour of the buck-boost converter for the three operating modes, we propose an architecture based on peak current-control. Using a three modes selection circuit and a soft start circuit, this converter is able to expand the power conversion efficiency and reduce inrush current at the feedback loop. The proposed converter is designed to operate with a variable output voltage. In addition, we use LDMOS transistors with low on-resistance, which are adequate for HV applications. The obtained results show that the proposed buck-boost converter perform perfectly compared to others architecture and it is successfully implemented using 0.18 μm CMOS TSMC technology, with an output voltage regulated to 12V and input voltage range of 4-20 V. The power conversion efficiency for the three operating modes buck, boost and buck-boost are 97.6%, 96.3% and 95.5% respectively at load current of 4A.

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