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Abstract-This paper deals with the implementation of FPGA and ASIC designs to calculate the distance and speed of a moving remote object using laser source and echo pulses reflected from that remote object. The project proceeded in three phases for the FPGA implementation: All-in-C design using Xilinx Microblaze soft core processor system, an accelerated design with custom co-processor and Microblaze soft core processor system, and full custom hardware design implemented using VHDL on Xilinx FPGA. Later the complete system was implemented on ASIC. The ASIC implementation optimized the modules for area and timing for a 130nm process technology.

Abstract-The design and implementation of digital hearing aids requires a detailed knowledge of various digital signal processing techniques used in hearing aids like Wavelet Transforms, uniform and non-uniform Filter Banks and Fast Fourier Transform (FFT). In this paper the design and development of digital part of hearing aid is divided into three different phases. In the first phase review and Matlab simulation of various signal processing techniques used in the digital hearing aids is presented. In the second phase a software implementation was carried out and the firmware was designed for the Xilinx Microblaze softcore processor system. In the third phase everything was moved into hardware using VHDL hardware description language. The implementation was done on Xilinx Field Programmable Gate Array (FPGA) Development Board.

Abstract-An Arithmetic Logic Unit (ALU) is the heart of every central processing unit (CPU) which performs basic operations like addition, subtraction, multiplication, division and bitwise logic operations on binary numbers. This paper deals with implementation of a basic ALU unit using two different types of adder circuits, a ripple carry adder and a sklansky type adder. The ALU is designed using application specific integrated circuit (ASIC) platform where VHDL hardware description language and standard cells are used. The target process technology is 130nm CMOS from the foundry ST Microelectronics. The Cadence EDA tools are used for the ASIC implementation. A comparative analysis is provided for the two ALU circuits designed in terms of area, power and timing requirements.

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