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In this paper, we promote the idea that recent woes in hardware security are not because of a lack of technical solutions but rather because market forces and incentives prevent those with the ability to fix problems from doing so. At the root of the problem is the fact that hardware security comes at a cost; present issues in hardware security can be seen as the result of the players in the game of hardware security finding ways of avoiding paying this cost. We formulate this idea into a doctrine of security, namely the Doctrine of Shared Burdens. Three cases studies-Rowhammer, Spectre, and Meltdown-are interpreted though the lens of this doctrine. Our doctrine illuminates why these problems exist and what can be done about them.

In this work we present a new set of error correcting codes -Multi-Use Error Correcting Codes (MUSE ECC) -that have the ability to match reliability guarantees of all commodity, conventional state-of-the-art ECC with fewer bits of storage. MUSE ECC derives its power by building on arithmetic coding methods (first used in an experimental system in 1960s). We show that our MUSE construction can be used as a "drop in" replacement within error correction frameworks used widely today. Further, we show how MUSE is a promising fit for emerging technologies such as a DDR5 memories. Concretely, all instantiations of MUSE we show in this paper offer 100% Single Error Correction, and multi-bit error detection between 70% and 95% while using fewer check bits. MUSE ECC corrects failure of a single chip on a DIMM with check bit space savings of 12.5% compared to conventional techniques. The performance overheads, if any, are negligible. Our results open the possibility of reusing ECC storage for things beyond reliability without compromising reliability, thus solving a 40-year-old puzzle.

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Architects and systems designers artfully balance multiple competing design constraints during the design process but are unable to translate between system metrics and end user experience. This work presents three methodologies to fill in this gap. The first is an incentive-compatible methodology that determines a "ground truth" measurement of users' value of speed in terms of US dollars, and find that users would accept a performance losses of 10%, 20%, and 30% to their personal computer in exchange for $2.27, $4.07, and $4.43 per day, respectively. However, while highly accurate the methodology is a painstaking process and does not scale with large numbers of participants. To allow for scalability, we introduce a second methodology-a lab-based simulation experiment-which finds that users would accept a permanent performance loss of 10%, 20%, and 30% to their