Purpose This paper aims to study the concept, characteristics and factors of the resilient supply chain (RSC) and develop a hierarchical structural model and classify the factors based on their interrelationships. Design/methodology/approach This paper has used a mixed-approach of literature review and expert opinion to identify the factors of RSC. For the development of the structural model and clustering of the factors, this paper has used the total interpretive structural modeling approach with Matrice d’Impacts Croises-Multiplication Applique and Classment and decision-making trial and evaluation laboratory analysis. Findings In total, this study has identified 17 factors that enable the 3R capability of the RSC. The result shows that the factors have a close dependence relationship with supply chain (SC) risk management culture as the most influencing factor. Further, this study classifies the factors into enablers and strategies. Research limitations/implications This research work is the theoretical contribution to the RSC concept and helps the experts to develop and improve the resilient ability in the SC. This research is based entirely on subjective expert feedback; thus, the results are sensitive to the expert’s judgment. Practical implications This research will help the decision-makers in allocating the resources and policies to develop or improve the SC capabilities. Originality/value This research work is the first kind of research in the field of the RSC that considers the 3R concept to identify and model the resilient factors of the SC. Along with the theoretical concept, this research provides empirical evidence for the importance ranking of the factors.

In this paper, level Shifter circuit is analyzed which is efficient for converting low-voltage digital input signal into high-voltage digital output signal. The circuit has a diagnostic current generation device by using a logic error correction circuit that work by identifying the input and output logic level .When input signal changes, circuit produce low power operation only because it can dissipate power at the operating current. For the comparative analysis of this error correction Level Shifter different methodologies are used which named as biasing for the level Shifter. Result shows that the circuit converts a 0.4-V input signal to 3-V output signal. Simulation results are carried out by using 0.35μm CMOS technology. Power dissipation is 34nW for a 0.4V at 10 kHz input pulse. General TermsLow power design, leakage power, power dissipation, delay.

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