This paper presents the design and experimental results of a I.8V fractional-N frequency synthesizer. It Is implemented in a standard 0.18pm digital CMOS process. A quadrature VCO, providing a 4-phase output, uses combined current and varactor tuning to enable a 1.18GHz tuning range. It covers the entire 5-6GHz frequency span, making it suitable for wireless local area network (WLAN) applications, especially standards deflned for both the lower (5.15-5.35GHz) and upper (5.725-5.825GHz) unlicensed bands. The synthesizer phase noise for the lower frequency band Is107dBc/Hz 3 10MHz offset, and for the upper band the phase noise is -9ldBc/Hz @ 10MHz. The measured frequency resolution Is 5.05MHz, and the settling time is 520ps. All circuitry were optimized for low power consumption. For example, the prescaler/divider combination consumes 4.5mW compared to 19mW reported In 111.

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