InAs nanowires have been extensively studied for high-speed and high-frequency electronics due to the low effective electron mass and corresponding high carrier mobility. However, further applications still suffer from the significant leakage current in InAs nanowire devices arising from the small electronic band gap. Here, we demonstrate the successful synthesis of ternary InGaAs nanowires in order to tackle this leakage issue utilizing the larger band gap material but at the same time not sacrificing the high electron mobility. In this work, we adapt a two-step growth method on amorphous SiO(2)/Si substrates which significantly reduces the kinked morphology and surface coating along the nanowires. The grown nanowires exhibit excellent crystallinity and uniform stoichiometric composition along the entire length of the nanowires. More importantly, the electrical properties of those nanowires are found to be remarkably impressive with I(ON)/I(OFF) ratio >10(5), field-effect mobility of ∼2700 cm(2)/(V·s), and ON current density of ∼0.9 mA/μm. These nanowires are then employed in the contact printing and achieve large-scale assembly of nanowire parallel arrays which further illustrate the potential for utilizing these high-performance nanowires on substrates for the fabrication of future integrated circuits.

Due to the extraordinary large surface-to-volume ratio, surface effects on semiconductor nanowires have been extensively investigated in recent years for various technological applications. Here, we present a facile interface trapping approach to alter electronic transport properties of GaAs nanowires as a function of diameter utilizing the acceptor-like defect states located between the intrinsic nanowire and its amorphous native oxide shell. Using a nanowire field-effect transistor (FET) device structure, p- to n-channel switching behaviors have been achieved with increasing NW diameters. Interestingly, this oxide interface is shown to induce a space-charge layer penetrating deep into the thin nanowire to deplete all electrons, leading to inversion and thus p-type conduction as compared to the thick and intrinsically n-type GaAs NWs. More generally, all of these might also be applicable to other nanowire material systems with similar interface trapping effects; therefore, careful device design considerations are required for achieving the optimal nanowire device performances.

GaAs nanowires (NWs) have been extensively explored for next generation electronics, photonics and photovoltaics due to their direct bandgap and excellent carrier mobility. Typically, these NWs are grown epitaxially on crystalline substrates, which could limit potential applications requiring high growth yield to be printable or transferable on amorphous and flexible substrates. Here, utilizing Ni as a catalytic seed, we successfully demonstrate the synthesis of highly crystalline, stoichiometric and dense GaAs NWs on amorphous SiO(2) substrates. Notably, the NWs are found to grow via the vapor-solid-solid (VSS) mechanism with non-spherical NiGa catalytic tips and low defect densities while exhibiting a narrow distribution of diameter (21.0 ± 3.9 nm) uniformly along the entire length of the NW (>10 µm). The NWs are then configured into field-effect transistors showing impressive electrical characteristics with I(ON)/I(OFF) > 10(3), which further demonstrates the purity and crystal quality of NWs obtained with this simple synthesis technique, compared to the conventional MBE or MOCVD grown GaAs NWs.

InP NWs have been extensively explored for next-generation electronic and optoelectronic devices due to their excellent carrier mobility, exciton lifetime and wave-guiding characteristics. Typically, those NWs are grown epitaxially on crystalline substrates which could limit their potential applications requiring high growth yield to be printable or transferable on amorphous and flexible substrates. Here, utilizing Au as catalytic seeds, we successfully demonstrate the synthesis of crystalline, stoichiometric and dense InP NWs on amorphous substrates. Notably, the NWs are found to grow via the vaporliquid-solid (VLS) mechanism with a narrow distribution of diameter (34.6 AE 7.7 nm) uniformly along the entire NW length (>10 mm). Although the grown NWs possess a substantial amount of twin defects, the fabricated NW FETs still exhibit impressive electrical performance with high carrier mobility ($350 cm 2 V À1 s À1 ) and I ON /I OFF ratio ($10 6 ). All these have demonstrated the promising potency of such NWs grown on amorphous substrates for technological applications, as compared to the conventional MBE or MOCVD grown InP NWs.

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