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Spectrum sensing is one of the most important features of Cognitive Radio (CR) systems. Matched-filter based spectrum sensing techniques provide optimum sensing performance given that a number of characteristics of the transmitted signal are known by the sensors. Assuming that the received signal pertains to one communication standard from a given set of wireless technologies, conventional spectrum sensors employ separate filters corresponding to each standard which gives rise to increased power consumption and ciruit size. A novel reconfigurable matched-filter based spectrum sensor to be deployed in CR systems is proposed in order to overcome the disadvantages of conventional design methods. This approach proposes a spectrum of design qualities which trade-off area for reconfiguration overhead. We will show that our approach is capable of designing reconfigurable filter for standards with widely varying filter characteristics. I.978-1-4244-9474-3/11/$26.00 ©2011 IEEE

Wide range of digital systems from wireless devices to multi-media terminals are characterized by their multi-mode behavior. Many of these systems are deployed in high-radiation environments [5]. SRAM-based FPGAs are popular platforms to implement multi-mode systems, because of their high performance and reconfigurability. However, high susceptibility of FPGAs toward Soft Errors makes them less-than-reliable platforms. To overcome the reliability issue, various redundancy techniques have been proposed. These techniques exhibit different design and reliability characteristics. Considering the combined effect of design decisions and reliability techniques on system characteristics a coherent strategy should be devised to meet system requirements and constraints. In this work we propose a method to explore the design space for implementing a reliable multi-mode system. As we will show, different selections of design parameters and redundancy techniques generate a range of solutions which trade-off total area, reconfiguration overhead and reliability of the system. The choice of a specific solution remains a decision made by the system-designer.I.

Software Defined Radio (SDR) base stations can compensate for failures in disaster scenarios by assimilating different communication technologies. FPGAs play an important role in the platform of an SDR base station because of flexibility and DSP processing power that they deliver. The flexibility of FPGAs comes at the high cost of reconfiguration time overhead which can be a serious deterrence because of QoS requirements of real time traffic. In this paper we propose a solution to reduce reconfiguration time overhead at systemlevel where we are provided the configuration of each wireless system. Following that we step further and integrate our solution in to a floorplanner to generate placements for wireless systems which can systematically hide or reduce reconfiguration time overhead. Our experiments show the effectiveness of our approach 978-1-4244-2658-4/08/$25.00 ©2008 IEEE