In-memory computing (IMC) is one of the most promising candidates for data-intensive computing accelerators of machine learning (ML). A key ML algorithm for dimensionality reduction and classification is the principal component analysis (PCA), which heavily relies on matrix-vector multiplications (MVM) for which classic von Neumann architectures are not optimized. Here, we provide the experimental demonstration of a new IMC-based PCA algorithm based on power iteration and deflation executed in a 4-kbit array of resistive switching randomaccess memory (RRAM). The classification accuracy of Wisconsin Breast Cancer dataset reaches 95.43%, close to floating-point implementation. Our simulations indicate a 250× improvement in energy efficiency compared to commercial graphic processing units (GPUs), thus supporting IMC for energy-efficient ML in modern data-intensive computing.

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One of the objectives fostered in medical science is the so-called precision medicine, which requires the analysis of a large amount of survival data from patients to deeply understand treatment options. Tools like machine learning (ML) and deep neural networks are becoming a de-facto standard. Nowadays, computing facilities based on the Von Neumann architecture are devoted to these tasks, yet rapidly hitting a bottleneck in performance and energy efficiency. The in-memory computing (IMC) architecture emerged as a revolutionary approach to overcome that issue. In this work, we propose an IMC architecture based on resistive switching memory (RRAM) crossbar arrays to provide a convenient primitive for matrix-vector multiplication in a single computational step. This opens massive performance improvement in the acceleration of a neural network that is frequently used in survival analysis of biomedical records, namely the DeepSurv. We explored how the synaptic weights mapping strategy and the programming algorithms developed to counter RRAM non-idealities expose a performance/energy trade-off. Finally, we discussed how this application is tailored for the IMC architecture rather than being executed on commodity systems.

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The crossbar structure of Resistive-switching random access memory (RRAM) arrays enabled the In-Memory Computing circuits paradigm, since they imply the native acceleration of a crucial operations in this scenario, namely the Matrix-Vector-Multiplication (MVM). However, RRAM arrays are affected by several issues materializing in conductance variations that might cause severe performance degradation. A critical one is related to the drift of the low conductance states appearing immediately at the end of program and verify algorithms that are mandatory for an accurate multi-level conductance operation.In this work, we analyze the benefits of a new programming algorithm that embodies Set and Reset switching operations to achieve better conductance control and lower variability. Data retention analysis performed with different temperatures for 168 hours evidence its superior performance with respect to standard programming approach. Finally, we explored the benefits of using our methodology at a higher abstraction level, through the simulation of an Artificial Neural Network for image recognition task (MNIST dataset). The accuracy achieved shows higher performance stability over temperature and time.