The 1: track model for fault tolerant 2 0 processor arrays is extended to 30 mesh architectures. Non-intersecting, continuous, straight and non-near miss compensation paths are considered. It is shown that when six directions in the 30 mesh are allowed for compensation paths, then switches with 13 states are needed to preserve the 30 mesh topology after faults. It is also shown that switch reconfiguration after faults is local in the sense that the state of each switch is uniquely determined by the state of the 2 processors connected to it. 1: Introduction3D mesh architectures offer a greater degree of interconnection as compared to 2D meshes. In addition, for practical size arrays, the diameter of a 3D mesh is smaller than the diameter of 2D meshes since, the diameter of: 2D array with N processors is 2N' 2 and the diameter of a 3D mesh with N processors is 3 N S . In addition the 3D mesh has a larger bisection width than the 2D array. Moreover, due to the rich connectivity that the 3D mesh offers, it seems to be ideal for number crunching and image processing tasks like 3D Magnetic Resonance image processing and 3D connected component labeling [5]. Cray's recent massively parallel processing machine, CRAY T3D, has a 3D torus interconnect [4]. It is therefore desirable to extend 2D fault tolerance techniques into 3D.Several techniques for tolerating faulty processing elements (PE's) in 2D by replacing them with spare PE's have been studied [6,7,8,9, 11,12, 131. This paper extends the If track model used in 2D [9, 141 to 3D and studies reconfigurability in the 3D 1; track model. 2:The 3D mesh architecture can be considered as layers (in the zy plane) of 2D meshes stacked in the z direction. A 3 x 3 x 3 mesh is shown in Figure 1. Each P E is connected to its six nearest neighbors. The six neighbors are in the North (N), South (S), East (E), West (W), Z+ and Zdirections. A 1; track, 3D mesh model 194 1063-6722/94 $4.00 0 1994 IEEE

The [Formula: see text] track model for fault tolerant 2D processor arrays is extended to 3D mesh architectures. Non-intersecting, continuous, straight and non-near miss compensation paths are considered. It is shown that when six directions in the 3D mesh are allowed for compensation paths, then switches with 13 states are needed to preserve the 3D mesh topology after faults. The number of switch states reduces to 7 if only 3 directions are allowed for compensation paths. It is also shown that switch reconfiguration after faults is local in the sense that the state of each switch is uniquely determined by the states of the 2 processors connected to it.