The introduction of Phase-Change Memory (PCM) [6]. However, PCM poses challenges that have to be addressed for it to be used as a main memory replacement. Specifically, PCM suffers from limited endurance (i.e., it wears out due to write operations) and expensive write operations (i.e., high latency and energy). Indeed, too many writes to a PCM main memory will lead to a short device lifetime, poor performance and high energy consumption.Other memory technologies also suffer from limited endurance and expensive writes -Flash [7], [8] is the most common example. Much attention has been given to improve Flash memory lifetime and performance [7], [9]. As an example, Mylavarapu et al. introduce algorithms that avoid erase operations and apply wear leveling (WL) to enhance lifetime and performance [7]. Because the problems associated with Flash endurance/performance [8], [9] are different from the ones for PCM, Flash WL algorithms are of limited use in a PCM main memory. Flash WL algorithms [7] avoid erasing a page on every write by allocating a new clean physical page. This allocation is unnecessary for PCM due to its bit-addressability. PCM also has a larger overall endurance (i.e., it can sustain 10 7 writes rather than the 10 4 to 10 6 writes for Flash) and does not require predefined blocking.The use of PCM in main memory has recently been proposed with techniques applied to increase PCM lifetime. The PCM storage device presented in [10] implements a read-before-write (RW) loop at the bit level to improve reliability and extend lifetime. The work in [5] uses readbefore-write, row-level rotation (RL) and segment swapping (SS) as endurance enhancements at the device level. RL equalizes wear at the row level by rotating cache lines. SS is done by swapping two segments: the one currently being written and the one that is least-frequently-written (LFW). However, the large segment size (1MByte) used in SS [5] degrades lifetime compared to a small segment size because the distribution of writes to a large segment can be skewed. Nevertheless, large segments are used in [5] to reduce the costs associated with searching for the LFW segment during a swap.A system level approach is used in [3] to incorporate PCM in the memory hierarchy. This work proposes a hybrid memory, where a large PCM memory is augmented with a small DRAM that acts as a "page cache" for the PCM memory. The page cache helps performance by buffering frequently needed pages. It also helps endurance by reducing the number of writes to PCM with write combining and coalescing. Although the page cache filters writes to PCM, it does not fully mitigate the endurance problem. Additional techniques are applied at the cache line and block levels. At the cache line level, only the lines modified in a page are written to PCM. To avoid unbalanced damage from writes, cache lines are rotated on a page. Finally, swapping is used at the block level for wear leveling.In this paper, we propose three new approaches to address the endurance problem when PCM is used...

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Abstract. This paper addresses multicast routing in multi-hop optical networks employing wavelength-division multiplexing (WDM). We consider a model in which multicast communication requests are made and released dynamically over time. A multicast connection is realized by constructing a multicast tree which distributes the message from the source node to all destination nodes such that the wavelengths used on each link and the receivers and transmitters used at each node are not used by existing circuits. We show that although the routing and wavelength assignment in this model is NP-complete, the wavelength assignment problem can be solved in linear time.

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This paper considers optimal routing and channel assignment (RCA) schemes to realize hypercube communication on optical mesh-like networks. Specifically, we identify lower bounds on the number of channels required to realize hypercube communication on top of array and ring topologies and develop optimal RCA schemes that achieve the lower bounds on these two topologies. We further extend the schemes to mesh and torus topologies and obtain RCA schemes that use at most 2 more channels than the optimal for these topologies.