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This paper presents a voltage-controlled oscillator (VCO) based current to digital converter for sensor readout applications. Second order noise shaping of the quantization error is achieved by using implicit capacitance of the sensor to realize a passive integrator and a VCO-based quantizer. The non-linearity in voltage to frequency conversion of the VCO is tackled by placing the VCO in a loop consisting of a simple digital IIR filter and a passive integrator. The IIR filter provides large gain within the signal bandwidth and suppresses VCO input swing. As a result, non-linearity of the VCO is not exercised, thus greatly improving the proposed architecture's immunity to VCO nonlinearity. The use of a digital filter instead of an analog loop filter eases the design and makes it scaling friendly. Designed for an ambient light sensor application, the proposed circuit achieves 900 pA accuracy over an input current range of 4 A. Fabricated in a 0.18 m CMOS process, the readout circuit consumes a total of 77.8 A current, and occupies an active area of 0.36 mm .Index Terms-VCO based ADC, time based ADC, analog-to-digital conversion, current sensor, delta-sigma modulation, digital readout circuits, ambient light sensor, sensor applications.

In this paper, an end-to-end CMOS application specific integrated circuit (ASIC) for readout channel in a cardiac electrical impedance tomography system is presented. The ASIC consists of an integrated current driver for current injection, an instrumentation amplifier, variable gain amplifier at the analog front end for voltage readout from electrodes, and an on-chip 10-bit successive approximation register analog to digital converter with serial peripheral interface. The ASIC is fabricated in the CMOS 0.18 $\mu$ m process with a supply voltage of 3.3 V. Amplitude and phase extraction of the voltages is performed in the digital domain with a matched filter. A fully integrated solution for use in multiple electrode system is demonstrated. The readout chain in the ASIC achieves a minimum signal-to-noise ratio of 71 dB over the frequency range of 500 Hz-700 kHz, while maintaining an average accuracy of 99.7 $\%$. Frame rates of 21 frames per second for a 32 electrode system is feasible, and the ASIC has an overall power consumption of 11.8 mW.

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