Abstract-CoolMOS™ is a novel power MOSFET with a "superjunction" for its drift region, which results in a vastly improved relationship between the on resistance and breakdown voltage. The presence of the superjunction makes the device physics very interesting and complicated. In this paper, we present simulation results aimed at understanding the device operation both in the on state and in the off state. Quasi saturation of the drain current is analyzed, and it is shown that it can be prevented by increasing the doping density of the drift region. An analytic model of the JFET-like drift region is presented. A CoolMOS™ transistor model based on the simulation results described here will be presented in an accompanying paper.

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Abstract-An accurate dc model for the CoolMOS™ power transistor is presented. An elementary model consisting of an intrinsic MOSFET and a JFET to represent the drift region, is first discussed and it is pointed out that this is a rather poor model, needing improvements. Using device simulation results, it is shown that, by replacing the gate and drain voltages of the intrinsic MOSFET by appropriate "effective" voltages, a highly accurate model is obtained. A systematic procedure for parameter extraction is described and an implementation of the new model in the form of a SPICE subcircuit is given.

This paper presents a process in which a 55V-class of power devices is added to baseline 0.25um 2.5V/5V/20V CMOS technology by forming asymmetric extended-drain device structures in which an inverted well design concept is utilized to form an extended-drain dielectric region. The R sp -BV ds figure-of-merit is consistent with best-in-class (0.65 mOhm cm 2 / 70V NMOS, 1.60 mOhm cm 2 / 70V PMOS), and the voltage handling is drift-length scalable from 20V to over 75V. Three classes of non-volatile memory are modularly implemented in the process flow consisting of singlepolysilicon hot-carrier programmed OTP, single polysilicon 2T FN-FN MTP, and double-polysilicon 2T EEPROM. The combination of high-performance integrated power devices with non-volatile memory results in cost-effective implementation of features necessary for solid-state lighting systems.