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Switched reluctance motor (SRM) offers several advantages compared to conventional motors such as low cost, rugged design and good high-speed performance. Torque ripple and the associated acoustic noise and vibrations have been a challenge for its application in low and medium power applications. The torque ripple is due to double salient structure and nonlinear magnetic characteristics of the machine. This study presents a sense coil system to measure instantaneous inductance that represents the non-linearity and saturation effects. The current profile is generated from the measured inductance to minimise the torque ripple and reduce the copper losses. The speed of motor is derived from the measured inductance thereby eliminating need for an external sensor. The effect of temperature and asymmetries in machine construction are compensated due to the dynamic nature of inductance measurement. The proposed method is implemented on a SoC FPGA to control the speed of SRM with reduced torque ripple.

Summary In spite of simple, rugged, and low‐cost construction of switched reluctance motor (SRM) motor, it has not gained wide spread usage in many applications because of torque ripple and audible noise. The nonlinear magnetic characteristics of SRM are the major cause for torque ripple. The torque ripple can be minimized by controlling the current according to the rate of change of inductance. A low‐cost sense winding system is proposed, which measures instantaneous inductance of the motor. The current references are computed from the measured instantaneous inductance to reduce the torque ripple. The proposed sense winding concept can also measure the rotor speed and rotor angle, which will eliminate the need of external position sensors such as encoder. The dynamic nature of inductance measurements will overcome the drawbacks of offline inductance measurement, such as effect of temperature, asymmetry in motor construction, and the need for tests to capture offline inductance. The signal processing of the sense voltages is implemented on a system on chip (SoC) field‐programmable gate array (FPGA) along with the speed and current control loops. The proposed sense winding system is validated with the help of the Ansys Maxwell 2D as well as experimental prototype.