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For thermal neutron experiments at ESS very high resolution and fast hybrid microstrip gas chamber (MSGC) detectors are being developed at HMI, which lend themselves for setting up large-area detector arrays comprising detector cells of 285 mm x 285 mm size. These detectors utilize a composite 157 Gd/CsI foil converter and novel robust multilayer microstrip glass plates, which are optimized for a low-pressure two-stage gas amplification mode. Using a delay-line based, interpolating readout mode with sub-segmentation on the plates, the detectors have the potential to combine position resolutions of 0.1-0.3 mm FWHM, time-of-flight (TOF) resolutions of less than 10 ns and a counting rate capability in the range of Mevents/s per cell, which is limited by the present version of the data acquisition system. To handle these high data rates a PCI-bus board has been developed comprising four 8-channel multihit TDC chips (~150 ps LSB) of the F1 type, one digital signal processor (1 GFLOP DSP) for online data processing and a histogram memory (HM) of 256 MB. By means of the DSP the data of the registered coordinates X, Y, TOF and pulse-height, measured by means of time-over-threshold discriminators in the TDCs, can either be calibrated and transformed online into 2D spectra accumulated in the HM or read out in list-mode.

The conventional design of detector electronics for resistive-wire position sensitive neutron detectors (PSD) using charge sensitive preamplifiers and gauss-pulse shaping devices causes uncertainty in spatial position and resolution due to charge equalization between both ends of the resistive PSD. Errors introduced by charge equalization may be in excess of limitations given by noise, linearity, dynamic range or EMI. This paper describes in detail charge equalization effects and their drawbacks for a PSD system design. Error estimations for a conventional detector design are given. Attained results should help to better understand PSD electronics design and to provide data for system optimization.