This paper examines the increasing trend of universities to pursue electronic thesis and dissertation (ETD) programs. Although the goal of most programs is similar, procedural variations impact a program’s long-term success. As primary research generators, responsibility for providing long-term access to unique materials must be borne by universities. However, this responsibility is in conflict with many ETD program goals, such as increased access and ease of production.

Software radios are an attractive alternative to conventional designs. However, they place rather extreme demands upon the analog to digital and digital to analog converters in the signal processing chain. This paper explores the detailed requirements of data converters in software radios.

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Harris Corporation has undertaken a Multi-Chip Module (MCM) project that will develop a four-channel digital RF receiver as a very dense, light weight system. This MCM is designated the Digital Drop Receiver (DDR). Each channel is comprised of three Harris Semiconductor chips: two Digital Decimating Filters, and a Numerically Controlled OsciIIatoriMcdulator. These circuits are designated the DDF (HSP 43220) and the NCOM (HSP 45 I16), respectively. A single-channel system has heen implemented with its supporting logic chips in a 6" X 7" PCB (Printed Circuit Board). The four-channel module is fahricated on a 2.5" X 2.5" suhstrate that will be assembled in a 2.75" X 2.75" metal package having 200 leads. The module contains a total of 41 chips, twelve being VLSI.To test currently available substrate technologies, the substrate is fabricated in two different varieties: a low-temperature cofired ceramic, the DuPont Green TapeTM, and a high-density copper/ polyimide, the MCC QTAl (Microelectronics and Computer Technology Corporation, Quick Tumaround Interconnect).Bonding to the top level of the system is done by both TAB (Tape Automated Bonding) and gold wire bonding. TAB assembly is used for the VLSI chips (the NCOM and the DDF) in order to be able to pretest thesz circuits at their maximum operating sped (up to 33 MHz) prior to assembly, and thereby reduce die rework.concepts, which allow defective die or interconnects to he easily identified, thus facilitating module rework. This approach does not require boundary scan to he incorporated into chip design, or test registers to he added to the module.An important feature of this MCM IS that it exploits design-for-testahility lntroduction The development of a Multi-Chip-Module by Harris has the dual goals of not only providing access to an infrastructure for MCM fabrication, but also developing a prototype MCM for entrance into a new market for miniature subsystems products. The progress of this endeavor is paced by the way new technology insertion is managed. One obstacle to this program's success is the lack of some of the needed tools, methods, or materials, since the practiced state-of-art in some areas of MCM manuficturing expertise is still being defined.Developing the repertoire of skills required to execute a MCM is a formidable task for a single company to do internally. Therefore, the establishment of a capable commercial infrastructure is crucial, not only to the DDR, but to any future MCM project. It is then essential to exercise the supplier and CAE community to create this structure. One valuable outcome of this program will be an established MCM supplier infrastructure in the areas of design, simulation, CAE database transfer, TAB assembly, MCM substrate assembly, and test. To this end, Harris has undertaken the development of a fourchannel digital RF receiver. This module's intended market is in the area of digital signal processing for wide-band spectral analysis and as such, it represents the prototyping phase of a new product. Figure 1 shows the DDR M...