In this study, we propose an analog CMOS integrate-and-fire (I & F) neuron circuit with a synaptic off-state current blocking operation. The proposed circuit prevents unintended potential changes in the membrane capacitor owing to the off-state current of synaptic devices, thereby preventing a decrease in the accuracy of the spiking neural network (SNN) inference system. Compared to the conventional I & F neuron circuit, the basic I & F and synaptic off-current blocking operations of the proposed I & F neuron circuit were confirmed in a circuit-level simulation. Furthermore, to verify the effect of the proposed circuit on the neural network, a multi-layer SNN simulation was performed, and the accuracy of the inference system was compared for the conventional and proposed I & F neuron circuits. The simulation and analysis results demonstrate the robustness of the I & F neuron circuit to the drop in accuracy of inference systems due to off-state currents in synaptic devices. INDEX TERMS neuromorphic system, CMOS-based integrate-and-fire (I & F) neuron circuit, spiking neural networks (SNNs), synaptic off-state current blocking operation, TCAD simulation, SPICE simulation, SNN high-level simulation.

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A circular ferroelectric tunnel junction (C-FTJ) is proposed for larger memory window and better endurance than a conventional planar FTJ (P-FTJ). The electrical characteristics of the proposed C-FTJ are evaluated compared with a conventional P-FTJ by using device simulation. It is confirmed that C-FTJs have more excellent ferroelectric switching than P-FTJs because the electric field becomes more concentrated across the ferroelectric layer. Also, C-FTJs show better endurance because the electric field applied to the interfacial layer is alleviated.

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