In this work, highly linear AlGaN/GaN laterally gated (or buried gate) high-electron-mobility transistors (HEMTs) are reported. The effect of gate dimensions on source-access resistance and the linearity of laterally gated devices are investigated experimentally in detail for the first time. Transistors with different gate dimensions and conventional planar devices are fabricated using two-step electron beam lithography (EBL). Current-voltage, source-access resistance, small-signal, and two-tone measurements are performed to evaluate the linearity of devices. Contrary to conventional planar HEMTs, the intrinsic transconductance of laterally gated devices monotonically increases with increasing gate voltage, showing a similar behavior as junction field-effect transistors (FETs).The source-access resistance shows a polynomial increase with the drain current, which can be reduced by decreasing the filling ratio of the buried gates. Through the optimization of these two competing factors, i.e., intrinsic transconductance and the source-access resistance, flat transconductance with high linearity is achieved experimentally. The laterally gated structure shows flat transconductance and small-signal power gain over a larger span of gate voltage that is 2.5 times higher than a planar device. Moreover, 6.9-dB improvement in output intercept point (OIP3)/P DC is

In this paper, we present a highly robust GaN-based X-band low-noise amplifier (LNA) showing promising small-signal and noise performance as well as good linearity. The LNA is fabricated using in-house 0.15 μm AlGaN/GaN on a SiC HEMT process. Owing to the optimum choice of HEMT topologies and simultaneous matching technique, LNA achieves a noise figure better than 2 dB, output power at 1 dB gain compression higher than 19 dB, input and output reflection coefficients better than À9 and À11 dB, respectively. The small-signal gain of LNA is more than 19 dB for the whole band, and NF has a minimum of 1.74 dB at 10.2 GHz. LNA obtains an OIP3 up to 34.2 dBm and survives input power as high as 42 dBm. Survivability is investigated in terms of gain compression and forward gate current. Reverse recovery time (RRT), a crucial parameter for radar front-ends, is explored with respect to the RC time constant and trap phenomenon. The analysis shows that the significant contribution in RRT is due to traps while the RC time constant is in the nanoseconds range. Moreover, this study also addresses the requirement and choice of a DC gate feed resistor for the subsequent stages in a multi-stage design. The size of the designed LNA chip is 3 mm  1.2 mm only.

In this paper, two high efficiency monolithic microwave integrated circuits (MMICs) are demonstrated using NANOTAM's in-house Ka-band fabrication technology. AlGaN/GaN HEMTs with 0.2 ${\rm \mu}$ m gate lengths are characterized, and an output power density of 2.9 W/mm is achieved at 35 GHz. A three-stage driver amplifier MMIC is designed, which has a measured gain higher than 19.3 dB across the frequency band of 33–36 GHz. The driver amplifier exhibits 31.9 dB output power and 26.5% power-added efficiency (PAE) at 35 GHz using 20 V supply voltage with 30% duty cycle. Another two-stage MMIC is realized as a power amplifier with a total output gate periphery of 1.8 mm. The output power and PAE of the power amplifier are measured as 3.91 W and 26.3%, respectively, at 35 GHz using 20 V supply voltage with 30% duty cycle. The high efficiency MMICs presented in this paper exhibit the capabilities of NANOTAM's 0.2 $\rm\mu$ m AlGaN/GaN on SiC technology.

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In this study, an enhancement-mode (E-mode) GaN high electron mobility transistor (HEMT) with lateral tri-gate structure field effect transistor (FinFET) is proposed. To passivate the fin width, while keeping the normally-off performance of the FinFET intact, an ultrathin aluminium-oxide/sapphire (Al2O3) gate dielectric is proposed (in a basic single-finger 0.125 mm device). Later, the DC and radio frequency (RF) performances of the proposed FinFET designs (with optimized fin width and Al2O3 thickness) are compared with that of conventional planar HEMT. DC and RF measurements are performed using power transistors in 10-fingers configuration, with a total gate periphery of 2.5 mm. The effect of Fin structure and Al2O3 thickness on the electrical performance of HEMTs, including threshold voltage (Vth) shift, transconductance (gm) linearity, small-signal gain, cut off frequency (ft), output power (Pout), and power-added efficiency (PAE) are investigated. Based on our findings, FinFET configuration imposes normally-off functionality with a Vth= 0.2 V, while the planar architecture has a Vth= -3.7 V. Originating from passivation property of the alumina layer, the FinFET design exhibits two orders of magnitude smaller drain and gate leakage currents compared to the planar case. Moreover, large signal RF measurements reveals an improved Pout density by over 50% compared to planar device, attributed to reduced thermal resistance in FinFETs stemming from additional lateral heat spreading of sidewall gates. Owing to its superior DC and RF performance, the proposed FinFET design with ultrathin gate dielectric could bear the potential of reliable operating for microwave power applications, by further scaling of the gate length.