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In this paper the design of digital CMOS threshold logic circuits for low power applications is investigated. Two different basic elements for threshold circuits are presented. These circuits are characterized with regard to power and speed. More complex functions, i.e. a 1-bit full adder and an 8-bit carry-lookahead adder are given. Moreover an approach for the determination of the WIL-ratios for the transistors with an evolutionary algorithm is discussed.

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