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Modeling of Integrated Circuit Defect Sensitivities Until now only cursory descriptions of mathematical models for defect sensitivities of integrated circuit chips have been given in the yield literature. This paper treats the fundamentals of the defect models that have been used successfully at IBM for a period of more thanjifteen years. The effects of very small defects are discussedjirst. The case of photolithographic defects, which are of the same dimensions as the integrated circuit device and interconnection patterns, is dealt with in the remainder of the paper. The relationships between these models and test sites are described. Data from measurements of defect sizes are discussed. 2. Pinhole defects One class of defects, known as pinholes, occurs in dielectric insulators such as thin and thick silicon oxides, oxidized polysilicon, chemical vapor deposited insulators, quartz, etc. These defects are usually much smaller than a micrometer. Their occurrence can result in a short circuit between conductors produced at different photolithographic levels. The area in which such defects cause failures is the overlap region between two conductors that cross each other, as shown in Fig. 1. Defects that fall outside these overlap areas cannot cause short circuits. We call the overlap where failures do occur the "critical area." The words "defectsensitive area" and "susceptible area" have also been used in the same context. Critical areas of pinholes in most designs can be determined readily as the total overlap area between patterns at different photolithographic levels. When the integrated circuit masks are generated with a computer, algorithms are o Copyright 1983 by International Business Machines Corporation. Copying in printed form for private use is permitted without payment of royalty provided that (1) each reproduction is done without alteration and (2) the

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