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This paper presents a newly developed chip which performs long Finite Impulse Response (FIR) filtering (up to 512 coefficients). By using an innovative architecture based on small Fast Fourier Transforms (FFT) and short FIR filters, one can achieve such a function on a single chip at a reasonable price : FDF (short for Frequency Domain Filter), 1 cm2 in area with 1 million transistors, has been designed in a 3.3V 0 . 5~ triple metal level technology.

We propose VLSI architectures for real-time convolutions of an image by any large kernel with symmetries. Horizontal, vertical and central symmetries are considered, in order to reduce the hardware requirements. Based on these architectures, a chip is proposed, which would implement a real-time convolution of 512*512 images with kernels up to 11x11 and allow on-line processing of video format images.

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