We present a systematic investigation of the oxidation properties of Si dots fabricated on a silicon-on-insulator ͑SOI͒ wafer. Dots with diameters varying from 9 to 81 nm were structured on a SOI wafer. These dots were oxidized in a dry oxygen atmosphere at 700, 850, and 1000°C. The resulting structures were investigated using a side view transmission electron microscopy ͑TEM͒ technique in combination with energy filtered TEM. The dimensions of the residual Si and the grown SiO 2 were then extracted from the micrographs and analyzed. The oxidation appears to be retarded as compared to the well-known planar oxidation. At 700 and 850°C a self-limiting effect is observed as well as a clear pattern dependent oxidation at 850 and 1000°C. We attribute these effects to stress buildup in the oxide. The critical stress, causing the self-limiting effect, is calculated using a model that considers the decrease of the reaction rate with increasing stress perpendicular to the Si surface.

Uniformly doped single electron transistors nominally consisting of a single island and two silicon tunneling barriers have been fabricated on silicon–on–insulator material. Two operation regimes are found depending upon the gate voltages applied. The structure acts either as a multiple tunnel junction device or as a single electron transistor consisting of a single dot corresponding to the geometrical shape of the device. The multiple tunnel junction behavior is attributed to the formation of additional tunneling barriers, introduced into the structure by the high doping level. We demonstrate that these barriers can be removed by raising the Fermi level via the application of an appropriate gate voltage.

We have studied the electrical transport through two adjacent double dot structures realized in Si-on-insulator material. The small dimensions of dots and the distance between the centers of the dots, here 100 nm, allow for dc measurements at 4.2 K. We demonstrate that although the structures are entirely doped, we are able to operate both double dot structures simultaneously in the double dot regime. Clear Coulomb blockade characteristics with a Coulomb blockade region of 20 mV are observed in both structures. Using gates, the number of electrons on each individual dot can be manipulated simultaneously. From the measured charging diagrams the capacitances between the gates and the dots are determined.

We have fabricated and characterized a uniformly n-doped silicon double-dot structure. The electrical behaviour could be changed between that of a multiple tunnel junction and that of a double dot by applying appropriate gate voltages. The double-dot characteristics observed can be attributed to the geometry of the structure, and it is shown that the influence of the multiple tunnel junctions can be entirely eliminated. In the double-dot regime, characteristic charging diagrams were obtained by independently sweeping two sidegate voltages. Using a classical capacitance equivalent circuit the hexagonal lattice of the conductance resonances in the charging diagram was modelled and single-electron charging in the geometrical double dot is concluded from the match between model and experimental data.

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