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It has been well known for years that as the critical feature size within a chip keeps shrinking, design and optimization among power, heat and performance would become even challenging. On one hand, the electrical functionalities of the devices are closely coupled with temperature and power distributions. On the other hand, the devices within the chip are not totally isolated and confined-the connection and interaction with the environments such as the package, board, and enclosure cannot be ignored especially from the heat transport perspective. Simulation tools in electronic design automation have to satisfy the requirement of electrical/thermal cosimulation for advanced electronic systems having a wide range of critical sizes, and provide efficient approaches with accurate data for design optimization. This is the main purpose of this paper, and we introduce a portfolio of tools to facilitate electrical/thermal cosimulation from chip, package, board to system.

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In this paper, we detailed the system electrothermal transient co-design modeling and silicon validation effort that led to the industry’s first highly efficient, highest power density (40A) synchronous step-down converter. The device was designed in an innovative multichip module (MCM) low-profile LQFN packaging technology. By integrating the control and drive circuitry with two discrete N-channel power MOSFETs, significant reduction in system on-resistance, RDS(ON), was achieved. The validity of the co-design electrothermal modeling methodology was assessed by comparing directly to silicon thermal measurements made on an evaluation module (EVM) which comprises the inductor, capacitor, and other essential components. Correlation between simulation and laboratory measurements on the integrated solution will be discussed.

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