High-field-effect-mobility InSnZnO thin-film transistors (TFTs) are prepared through Al-induced microstructure regularization (AIMR) at an annealing temperature lower to 400 °C. Spherical crystalline particles are distributed throughout the back channel near the Al layer, while an amorphous phase still represents the front channel but with enhanced microstructure ordering. Especially, the packing density is distinctly increased, and oxygen vacancies are largely reduced. The optimized TFT exhibits excellent performance with a steep sub-threshold swing of 0.18 V/dec, a high on/off current ratio of 2.5 × 108, a threshold voltage of −0.21 V, and a small threshold voltage shift of −0.24 V under negative bias stress (−20 V, 3600 s), especially a remarkable field-effect mobility boosted to 53.2 cm2/V s compared to 19.1 cm2/V s for the TFT without the Al layer. After Al removal, the TFT performance shows no obvious degradation, implying good compatibility of the AIMR technique to the current device process.
Back-channel-etch-structured thin-film transistors (TFTs) employing amorphous Indium-Gallium-Zinc-Tin-Oxide (IGZTO) and Mo/Al as active layer and source/drain, respectively, were demonstrated with good electronic property and bias-temperature-stress stability. LCD panels addressed by such TFTs with gate-driver-on-array circuit passed the 1000hour high-temperature-operating and high-temperature/ humidity-operating reliability tests, revealing excellent prospect for mass-production.
Amorphous oxide semiconductor thin‐film transistors (AOS TFTs) are ever‐increasingly utilized in displays. However, to bring high mobility and excellent stability together is a daunting challenge. Here, the carrier transport/relaxation bilayer stacked AOS TFTs are investigated to solve the mobility‐stability conflict. The charge transport layer (CTL) is made of amorphous In‐rich InSnZnO, which favors big average effective coordination number for all cations and more edge‐shared structures for better charge transport. Praseodymium‐doped InSnZnO is used as the charge relaxation layer (CRL), which substantially shortens the photoelectron lifetime as revealed by femtosecond transient absorption spectroscopy. The CTL and CRL with the thickness suitable for industrial production respectively afford minute potential barrier fluctuation for charge transport and fast relaxation for photo‐generated carriers, resulting in transistors with an ultrahigh mobility (75.5 cm2 V−1 s−1) and small negative‐bias‐illumination‐stress/positive‐bias‐temperature‐stress voltage shifts (−1.64/0.76 V). The design concept provides a promising route to address the mobility‐stability conflict for high‐end displays.
High‐performance bilayer In2O3/IGZO thin‐film transistors (TFTs) fabricated by pulsed laser deposition are reported. The TFTs exhibit an on/off current ratio of 109, a reversed subthreshold slope (ss) of 0.08 V dec−1, and a high saturation mobility of 47.9 cm2 V−1 s−1. The reliability of the mobility values is critically validated and assessed by four‐probe measurements, the transfer‐length method, and the temperature‐dependence. X‐ray photoelectron spectra are combined with C–V measurements to characterize the interface, and the results show that a two‐dimensional electron gas (2DEG)‐like state accumulates at the In2O3/IGZO interface. However, this state only forms in the subthreshold region and does not cause the high carrier mobility in the region above the threshold. Instead, the enhanced carrier mobility results from the intrinsic high mobility of the In2O3, the smooth surface, and the low‐defect states in the In2O3/IGZO bilayer with a good percolation transport path.
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