Graphene grown on a copper (Cu) substrate by chemical vapor deposition (CVD) is typically required to be transferred to another substrate for the fabrication of various electrical devices. PMMA-mediated wet process is the most widely used method for CVD-graphene-transfer. However, PMMA residue and wrinkles that inevitably remain on the graphene surface during the transfer process are critical issues degrading the electrical properties of graphene. In this paper, we report on a PMMA-mediated graphene-transfer method that can effectively reduce the density and size of the PMMA residue and the height of wrinkles on the transferred graphene layer. We found out that acetic acid is the most effective PMMA stripper among the typically used solutions to remove the PMMA residue. In addition, we observed that an optimized annealing process can reduce the height of the wrinkles on the transferred graphene layer without degrading the graphene quality. The effects of the suggested wet transfer process were also investigated by evaluating the electrical properties of field-effect transistors fabricated on the transferred graphene layer. The results of this work will contribute to the development of fabrication processes for high-quality graphene devices, given that the transfer of graphene from the Cu substrate is essential process to the application of CVD-graphene.

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Layer-release techniques for producing freestanding III-V epitaxial layers have been actively developed for heterointegration of single-crystalline compound semiconductors with Si platforms. However, for the release of target epitaxial layers from III-V heterostructures, it is required to embed a mechanically or chemically weak sacrificial buffer beneath the target layers. This requirement severely limits the scope of processable materials and their epi-structures and makes the growth and layer-release process complicated. Here, we report that epitaxial layers in commonly used III-V heterostructures can be precisely released with an atomic-scale surface flatness via a buffer-free separation technique. This result shows that heteroepitaxial interfaces of a normal lattice-matched III-V heterostructure can be mechanically separated without a sacrificial buffer and the target interface for separation can be selectively determined by adjusting process conditions. This technique of selective release of epitaxial layers in III-V heterostructures will provide high fabrication flexibility in compound semiconductor technology.