Polymer dielectric materials with hydroxyl functionalities such as poly(4-vinylphenol) and poly(vinyl alcohol) have been utilized widely in organic thin-film transistors (OTFTs) because of their excellent insulating performance gained by hydroxyl-mediated cross-linking. However, the polar hydroxyl functionality also deleteriously affects the performance of OTFTs and significantly impairs the device stability. In this study, a sub-20 nm, high-k copolymer dielectric with hydroxyl functionality, poly(2-hydroxyethyl acrylate-co-di(ethylene glycol) divinyl ether), was synthesized in the vapor phase via initiated chemical vapor deposition. The inherently dry environment offered by the vaporphase polymer synthesis prompted the snuggling of polar hydroxyl functionalities into the bulk polymer film to form a molecular thin hydrophobic skin layer at its surface, verified by near-edge X-ray absorption fine structure analysis. The chemical composition of the copolymer dielectric was optimized systematically to achieve high dielectric constant (k ≈ 6.2) as well as extremely low leakage current densities (less than 3 × 10 −8 A/cm 2 in the range of ±2 MV/cm) even with sub-20 nm thickness, leading to one of the highest capacitance (higher than 300 nF/cm 2 ) achieved by a single polymer dielectric to date. Exploiting the structural advantage of the cross-linked high-k polymer dielectric, high-performance OTFTs were obtained. Notably, the spontaneously formed molecular thin, hydrophobic skin layer in the copolymer film substantially suppressed the hysteresis in the transistor operation. The trap analysis also suggested the formation of bulk trap with a high energy barrier and sufficiently low trap densities at the semiconductor/dielectric interface, owing to the surface skin layer. Furthermore, the OTFTs with the −OH-containing copolymer dielectric showed an unprecedentedly excellent operational stability. No apparent OTFT degradation was observed up to 50 000 s of high constant voltage stress (corresponding to the applied electric field of 1.4 MV/ cm) because of the markedly suppressed interfacial trap density by the hydrophobic skin layer, together with the current compensation by the bulk hydroxyl functionalities. We believe that the surface modification-free, one-step polymer dielectric synthetic strategy will provide a new insight into the design of polymer dielectric materials for high-performance, low-power soft electronic devices with high operational stability.

capable of storing charges have garnered a huge research interest due to the advantageous characteristics of nondestructive read-out, single-transistor application, and compatibility with the complementary logic circuit. [19][20][21] In general, OTFT-NVMs can be categorized into three major types of floating gate, [20][21][22][23][24] ferroelectric memories, [18,25,26] and polymer electret, [27][28][29][30][31][32][33][34] in terms of the charge trapping or polarization methods. Among them, polymer electret-based OTFT-NVMs have been actively investigated because of the simple dielectric configuration consisting of a bilayer stack of polymer electret layer and blocking dielectric layer (BDL). Similar to silicon-oxidenitride-oxide-silicon (SONOS) memories in the silicon technologies, the electretbased OTFT-NVM does not require any additional conducting or metallic floating gate inside the gate dielectrics, which enables further thickness reduction and the development of high-density memories. [35][36][37] Moreover, their memory characteristics can be controlled by engineering the chemical structure or the functionalities of polymer electret materials, [38] such as its hydrophobicity, [28] polarity, [27] morphology, [39,40] intramolecular charge transfer, [41] and π-conjugation length/strength. [30,31] However, there are still big hurdles that limit the realization of low-power flexible OTFT-NVMs with polymer electrets into real field application. The programming/erasing operation of the polymer electret-based OTFT-NVMs requires imposing sufficiently high electric field (E) to the electret layer for the efficient charge transfer and trapping in order to secure a reasonable memory window. [27,29,42] On the other hand, the operating voltage must also be kept as low as possible for low-power consumption. Therefore, it is necessary to reduce the thickness of the electret layer to increase the E loaded to the electret layer (E elect ) without increasing the input voltage. A high-performance BDL is also required to ensure a stable programming/erasing operation. In the same manner, the thickness of the BDL must also be minimized with high dielectric constant (k) value for low-power operation. To date, however, decreasing the polymer electret thickness below a few tens of nm is accompanied by the decreased retention characteristics in most cases, due to the conducting pathway formation through the electret layer, [34,43] which strongly implies the existence of a tradeoff relationship between the operating voltages and the retention characteristics in the electret-based Organic thin film transistor nonvolatile memories (OTFT-NVMs) with polymeric electret layers have attracted research attention for the application to emerging wearable electronics. However, it is challenging to develop low-power flexible OTFT-NVMs due to the lack of candidate polymers for flexible electret and blocking dielectric layer (BDL) equipped with the thickness downscalability and sufficiently strong insulating properties. Here, this study reports a l...

In this context, organic thin-film transistors (OTFTs) have been considered as one of the most promising building blocks for next-generation electronics owing to their light-weight, [4] large-area processability, [5] and inherent flexible nature. [6] With the numerous efforts in last two decades, OTFTs-based integrated circuits have been developed widely in low-end applications such as radio frequency identification (RFID) tags, [7] sensors, [8] and high-gain inverters for amplifiers. [9,10] However, further enhancement toward large-scale integrated circuits have been challenging as lithography-based fine patterning have been limited due to the low stability of organic semiconductors against high temperatures and various solvents. [11] Multi-valued logic (MVL) can be an important approach to conquer this downscaling issue. The enhanced data processing efficiency based on additional logic states in the new computing system displays a significant potential for increasing the integration density. [12,13] For example, the interconnect lines can be reduced by nearly 45% in a ternary logic system compared to that in the conventional binary logic system. [14] Ternary logic devices can be implemented by employing heterojunction transistors (H-TRs). The H-TRs have p-and n-type semiconductors with a partial junction of each semiconductor in contact with only one of the source and drain. This results in a negative transconductance (NTC), which is represented as a "flipped V"-shaped transfer characteristic. [15,16] The biggest advantage of this approach is that an MVL circuit can be achieved by replacing a transistor with an H-TR in a conventional inverter circuit design. This enables three-state logic operation without increasing the required number of transistors of the conventional binary logic circuit. Several ternary logic inverters (T-inverters) based on H-TRs have been proposed using various new materials including transition metal dichalcogenides (TMDs), [17][18][19][20][21][22][23][24][25] graphene, [26,27] organic semiconductors, [28,29] and hybrid material combinations. [30][31][32] Notwithstanding the successful demonstration of T-inverters, the antiambipolar characteristics of H-TRs that display a substantially low on/off current ratio (I on /I off ) hindered the full-swing of the Organic multi-valued logic (MVL) circuits can substantially improve the data processing efficiency in highly advanced wearable electronics. Organic ternary logic circuits can be implemented by utilizing the negative transconductance (NTC) of heterojunction transistors (H-TRs). To achieve high-performance organic ternary logic circuits, the range of NTC in H-TRs must be optimized in advance to ensure the well-defined intermediate logic state in ternary logic inverters (T-inverters). Herein, a simple and efficient strategy, which enables the systematic control of the range and position of NTC in H-TRs is presented. Each thickness of p-/n-type semiconductor in H-TRs is adjusted to control the channel conductivity. Furthermore, asymmetric ...

High dielectric constant (k) and excellent insulating performance together with the thickness down‐scalability are essential requirements for polymer dielectrics to realize the stable operation of flexible, low‐power electronics. Crosslinking has been applied frequently to the dielectric polymer matrix to enhance the insulating performance. However, the addition of crosslinker into the polymer has been often accompanied by the reduction of the dielectric constant thereof. Herein, a series of copolymer dielectrics is synthesized composed of two monomers of 2‐cyanoethyl acrylate (CEA) possessing a highly polar cyanide functional group and 1,4‐butanediol divinyl ether (BDDVE), a crosslinker with relatively short chain length. The chemical composition of the 30‐nm‐thick copolymer dielectrics is optimized to achieve extremely low leakage current (<3.0 × 10−8 A cm−2 in the range of ± 2 MV cm−1) with unprecedentedly high dielectric constant of 7.5, which is, to the knowledge, the highest dielectric constant among the sub‐50 nm polymer dielectrics without inorganic component, reported to date. Exploiting the copolymer dielectric layers, high‐performance, low‐power organic thin‐film transistors (OTFTs) with high operational stability and extreme mechanical flexibility are demonstrated. It is believed that the high‐k dielectric copolymer films presented in this study will be an important guideline to develop future flexible, wearable electronics.

A new strategy for multilayer stacking using charge trapping layer (CTL) is proposed and a new CTL material is synthesized, which contains a trilayer dielectric with the total thickness less than 28 nm, deposited by initiated chemical vapor deposition (iCVD) process. 2.6 nm thick poly(1,3,5-trimethyl-1,3,5-trivinyl cyclotrisiloxane) (pV3D3) and 19 nm thick poly(1,4-butanediol diacrylate) (pBDDA) are employed as tunneling and blocking dielectric layers, respectively. A 6 nm thick ultrathin charge trapping layer containing hydroxyl group is inserted between the tunneling and the blocking layers for stable, long-term memory operation. For this purpose, a homogeneous copolymer of 1,4-butanediol diacrylate and 2-hydroxyethyl acrylate is newly synthesized. The fabricated memory with the trilayer dielectric shows larger than 5.8 V of memory window at low programming/erasing voltage of 16 V. The retention characteristics of the low-power organic memory device is improved significantly with the drain current decrease less than 0.40 order after 10 8 s, corresponding to one of the longest retention time periods obtained from organic NVM reported to date. The low-power organic NVM could also be integrated on flexible substrate, which is fully operational even under 2.72% of applied strain.